index
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coreboot.git
24.02_branch
4.1
4.10_branch
4.11_branch
4.12_branch
4.14_branch
4.15_branch
4.16_branch
4.18_branch
4.19_branch
4.2
4.20_branch
4.22_branch
4.3
4.4
4.8_branch
classic-2014.10
coreboot-v1
coreboot-v3
main
master
rampayload
Coreboot firmware sources
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path:
root
/
src
/
mainboard
/
intel
/
tglrvp
/
spd
Commit message (
Expand
)
Author
Age
Files
Lines
*
mb/hp to mb/kontron: Rename Makefiles from .inc to .mk
Martin Roth
2024-01-24
1
-0
/
+0
*
mb: remove duplicated Make code for spd.bin generation
Michael Niewöhner
2020-09-06
1
-16
/
+0
*
mainboard/intel/tigerlake: Update SPD files for TGL-UP3 RVP
Shreesh Chhabbi
2020-08-31
2
-10
/
+10
*
mb/tglrvp: Update SPD files for Hynix
Anil Kumar
2020-08-17
1
-1
/
+1
*
src: Remove leading blank lines from SPDX header
Elyes HAOUAS
2020-05-18
1
-3
/
+0
*
treewide: Remove "this file is part of" lines
Patrick Georgi
2020-05-11
2
-2
/
+0
*
src/: Replace GPL boilerplate with SPDX headers
Patrick Georgi
2020-05-09
1
-9
/
+1
*
mb/intel/{jasperlake_rvp, tglrvp}: Remove unused files
Subrata Banik
2020-04-14
1
-123
/
+0
*
mainboard/intel: Use SPDX for GPL-2.0-only files
Angel Pons
2020-04-06
2
-26
/
+4
*
mainboard/[g-p]*: Remove copyright notices
Patrick Georgi
2020-03-18
3
-3
/
+0
*
mb/intel/tglrvp: add Tiger Lake memory initialization support
Srinidhi N Kaushik
2020-02-26
5
-13
/
+125
*
mb/intel/tglrvp: Add initial mainboard code
Ravi Sarawadi
2020-01-14
4
-0
/
+216