| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | treewide: Unify Google branding | Jon Murphy | 2022-07-04 | 1 | -1/+1 |
| * | soc/intel/tigerlake: Add enum for `DdiPortXConfig` | Angel Pons | 2022-05-05 | 2 | -2/+2 |
| * | tpm: Refactor TPM Kconfig dimensions | Jes B. Klinke | 2022-04-21 | 1 | -1/+1 |
| * | ChromeEC boards: Drop `IGNORE_IASL_MISSING_DEPENDENCY` | Angel Pons | 2022-04-20 | 1 | -3/+0 |
| * | ChromeOS: Add DECLARE_x_CROS_GPIOS() | Kyösti Mälkki | 2022-04-07 | 2 | -10/+2 |
| * | ChromeOS: Promote variant_cros_gpio() | Kyösti Mälkki | 2022-04-06 | 2 | -13/+0 |
| * | soc/intel/tgl: move DIMM_SPD_SIZE from mb to SoC Kconfig | Michael Niewöhner | 2022-03-15 | 1 | -3/+0 |
| * | {mb, soc}: Change `memcfg_init()` and `variant_memory_init()` prototype | Subrata Banik | 2022-03-15 | 1 | -3/+1 |
| * | IASL: Ignore IASL's "Missing dependency" warning | Elyes HAOUAS | 2022-01-28 | 1 | -0/+3 |
| * | soc/intel/tgl: Replace dt `HeciEnabled` by `HECI1 disable` config | Subrata Banik | 2022-01-14 | 2 | -6/+0 |
| * | soc/intel/tigerlake: add devicetree option PcieRpSlotImplemented | Michael Niewöhner | 2022-01-14 | 2 | -0/+8 |
| * | mb: Add space before closing comment block keyword | Paul Menzel | 2021-12-23 | 2 | -2/+2 |
| * | ChromeOS: Refactor ACPI CNVS generation | Kyösti Mälkki | 2021-12-23 | 1 | -7/+0 |
| * | drivers/intel/pmc_mux/conn: Change usb{23}_port_number fields to device pointers | Reka Norman | 2021-12-23 | 2 | -8/+8 |
| * | soc/intel/tigerlake: Hook up DPTF device to devicetree | Felix Singer | 2021-12-09 | 2 | -6/+0 |
| * | soc/intel/tigerlake: Hook up SMBus device to devicetree | Felix Singer | 2021-12-09 | 2 | -2/+0 |
| * | Reland "vboot_logic: Set VB2_CONTEXT_EC_TRUSTED in verstage_main" | Hsuan-ting Chen | 2021-11-15 | 1 | -0/+7 |
| * | ChromeOS: Replace with or add <types.h> | Kyösti Mälkki | 2021-11-11 | 3 | -2/+3 |
| * | ChromeOS: Fix <vc/google/chromeos/chromeos.h> | Kyösti Mälkki | 2021-11-09 | 2 | -0/+2 |
| * | mb/google,intel: Fix indirect include bootmode.h | Kyösti Mälkki | 2021-11-05 | 1 | -0/+1 |
| * | mb/intel/tglrvp: Enable USB4 resources using SoC Kconfig | Furquan Shaikh | 2021-09-13 | 1 | -15/+1 |
| * | src/*: Specify type of `DIMM_SPD_SIZE` once | Angel Pons | 2021-09-03 | 1 | -1/+0 |
| * | soc/intel/common: Use CHIPSET_LOCKDOWN_COREBOOT by default | Felix Singer | 2021-08-28 | 2 | -2/+0 |
| * | mb/*/{tglrvp,volteer,deltaur}: move cpu_cluster configuration to chipset.cb | MAULIK V VAGHELA | 2021-08-16 | 2 | -4/+0 |
| * | mb/*/{tglrvp,volteer,deltaur}: Remove hardcoding of BSP APIC ID | MAULIK V VAGHELA | 2021-08-16 | 2 | -6/+2 |
| * | mb/*: Specify type of `VARIANT_DIR` once | Angel Pons | 2021-07-26 | 1 | -1/+0 |
| * | mb/*: Specify type of `DEVICETREE` once | Angel Pons | 2021-07-26 | 1 | -1/+0 |
| * | mb/*: Specify type of `MAINBOARD_PART_NUMBER` once | Angel Pons | 2021-07-26 | 1 | -1/+0 |
| * | mb/*: Specify type of `MAINBOARD_DIR` once | Angel Pons | 2021-07-26 | 1 | -1/+0 |
| * | mb/intel/tglrvp: Update Power Limit2 minimum value | Sumeet Pawnikar | 2021-07-08 | 2 | -2/+2 |
| * | soc/intel/tigerlake: Move MAX_CPUS to Kconfig | Andy Pont | 2021-06-10 | 1 | -4/+0 |
| * | mb/intel/tglrvp: Enable RTD3 for WWAN | Bora Guvendik | 2021-03-15 | 2 | -2/+14 |
| * | mb/intel/tglrvp/variants: Disable non-existing BT PCI interface and add BT flag | Cliff Huang | 2021-03-15 | 2 | -2/+6 |
| * | mb/*/*: Don't select PCIEXP_HOTPLUG | Arthur Heymans | 2021-03-03 | 1 | -1/+3 |
| * | src: Remove unused <arch/cpu.h> | Elyes HAOUAS | 2021-02-11 | 2 | -2/+0 |
| * | mainboards: Remove default CHROMEOS=y | Kyösti Mälkki | 2021-02-04 | 1 | -2/+0 |
| * | ACPI: Move include for <vc/google/chromeos.asl> | Kyösti Mälkki | 2021-01-28 | 1 | -5/+0 |
| * | ACPI: Add top-level ASL | Kyösti Mälkki | 2021-01-27 | 1 | -0/+1 |
| * | soc/intel/tgl and tgl mb/google,intel: Use the newly added meminit block driver | Furquan Shaikh | 2021-01-25 | 4 | -80/+83 |
| * | arch/x86: Use wildcard for mb/smihandler.c | Kyösti Mälkki | 2021-01-24 | 1 | -2/+0 |
| * | mb/intel/tglrvp: do UART pad config at board-level | Michael Niewöhner | 2021-01-21 | 3 | -1/+9 |
| * | mb/intel/tglrvp: Enable CNVi Bluetooth for UP4 | Bora Guvendik | 2020-12-14 | 1 | -1/+1 |
| * | mb/intel/tglrvp: Restrict SI_ME region to lower 16MiB | Furquan Shaikh | 2020-12-08 | 1 | -2/+2 |
| * | mrc_cache: Move code for triggering memory training into mrc_cache | Shelley Chen | 2020-11-13 | 1 | -1/+0 |
| * | mb, soc/intel: Reorganize CNVi device entries in devicetree | Furquan Shaikh | 2020-11-02 | 2 | -8/+12 |
| * | tigerlake mainboards: switch to devtree aliases for PMC MUX connectors | Tim Wawrzynczak | 2020-10-30 | 2 | -4/+8 |
| * | mb/*,soc/intel: drop the obsolete dt option `speed_shift_enable` | Michael Niewöhner | 2020-10-26 | 2 | -6/+0 |
| * | mb/intel/tglrvp: Enable Pcie WWAN m.2 | Bora Guvendik | 2020-10-14 | 4 | -2/+20 |
| * | {src/mb,util/autoport}: Use macro for DSDT revision | Elyes HAOUAS | 2020-10-13 | 1 | -1/+1 |
| * | mb, soc/intel: Switch to using drivers/wifi/generic for Intel WiFi devices | Furquan Shaikh | 2020-10-13 | 2 | -2/+2 |
