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path: root/src/mainboard/intel/wtm2/devicetree.cb
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* cpu/intel/haswell: Move chip_ops to cpu clusterArthur Heymans2022-11-251-6/+2
* soc/intel/broadwell: Hook up PCI domain and CPU cluster ops to devicetreeArthur Heymans2022-11-121-0/+2
* mb/intel/wtm2: Use Haswell CPU codeAngel Pons2021-01-241-1/+4
* soc/intel/broadwell: Separate PCH in devicetreeAngel Pons2020-10-301-2/+2
* mb/intel/wtm2: Prepare devicetree for PCH splitAngel Pons2020-10-301-37/+40
* broadwell: Factor out PIRQ routing from devicetreeAngel Pons2020-07-281-9/+0
* mb/*/*/devicetree.cb: Normalize disabled PIRQ valuesAngel Pons2020-07-261-4/+4
* mb/intel/wtm2/devicetree.cb: Align commentsAngel Pons2020-01-101-31/+31
* wtm2: Convert to use soc/intel/broadwellDuncan Laurie2015-01-041-70/+48
* wtm2: Set SerialIO I2C ports to 3.3VDuncan Laurie2013-11-251-2/+2
* haswell: configure c-statesAaron Durbin2013-11-241-6/+6
* wtm2: Enable SerialIO devices in ACPI modeDuncan Laurie2013-04-011-8/+12
* haswell/lynxpoint: Use new PCH/PM helper functionsDuncan Laurie2013-03-211-5/+4
* Add Intel Whitetip Mountain 2 mainboardDuncan Laurie2013-03-181-0/+85