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* mb/intel/shadowmountain: Update HDMI audio mode to 8TSugnan Prabhu S2021-03-171-1/+1
* mb/intel/shadowmountain: Disable xDCISugnan Prabhu S2021-03-171-1/+1
* mb/intel/tglrvp: Enable RTD3 for WWANBora Guvendik2021-03-152-2/+14
* mb/intel/tglrvp/variants: Disable non-existing BT PCI interface and add BT flagCliff Huang2021-03-152-2/+6
* mb/intel/adlrvp: Disable non-existing BT PCI interface and add BT flagCliff Huang2021-03-151-1/+3
* mb/intel/adlrvp_p: Support VBT for LP4, LP5 and DDR5 SKUsMeera Ravindranath2021-03-152-0/+20
* mb/intel/shadowmountain: Add ACPI entry for BT reset GPIOAamir Bohra2021-03-151-0/+2
* mb/intel/adlrvp: Select ADL_ENABLE_USB4_PCIE_RESOURCESTim Wawrzynczak2021-03-151-15/+1
* soc/intel/braswell: Factor out common `acpi_fill_madt`Angel Pons2021-03-121-19/+0
* mb/intel/adlrvp: do UART pad config at board-levelMichael Niewöhner2021-03-122-1/+11
* mb/intel/shadowmountain: Enable Type-C subsystemV Sowmya2021-03-122-2/+49
* mb/*/*: Don't select PCIEXP_HOTPLUGArthur Heymans2021-03-032-2/+6
* mb/{intel/d510mo,foxconn/d41s}/devicetree.cb: Remove PEG deviceArthur Heymans2021-03-031-1/+0
* mb/intel/d510mo/devicetree.cb: Indent with tabsArthur Heymans2021-03-031-94/+94
* soc/intel/skylake: Clean up SD GPIO handlingAngel Pons2021-03-014-4/+4
* mb/intel/shadowmountain: Add the ASL codeV Sowmya2021-02-271-0/+28
* mb/intel/shadowmountain: Add the ramstage codeV Sowmya2021-02-2711-9/+726
* vboot: update GBB flags to use altfw terminologyJoel Kitching2021-02-273-3/+3
* mb/intel/adlrvp_m: Add initial code for adl-m variant boardVarshit Pandya2021-02-245-4/+317
* mb/intel/adlrvp: Add support for LP5 SKU with boardid 0x17Subrata Banik2021-02-224-3/+10
* mb/intel/harcuvar: Drop build guards for ENABLE_FSP_MEMORY_DOWNAngel Pons2021-02-222-7/+4
* mb/intel/shadowmountain: Add the romstage codeV Sowmya2021-02-2210-0/+203
* mb: guard irq_tables for clang-formatPatrick Georgi2021-02-171-0/+2
* mb/intel/adlrvp: Fix incorrect SPD address issue on DDR4/DDR5Subrata Banik2021-02-171-4/+4
* mb/intel/adlrvp: Early program SMBUS CLOCK and DATASubrata Banik2021-02-171-0/+4
* mb/{intel,prodrive,protectli}: Remove unused <string.h>Elyes HAOUAS2021-02-161-1/+0
* soc/inteL/broadwell: Move select CHROMEOS_RAMOOPS_DYNAMICKyösti Mälkki2021-02-161-3/+0
* src/mb: Remove unused <console/console.h>Elyes HAOUAS2021-02-153-3/+0
* broadwell boards: Switch to Lynxpoint GPIO headersAngel Pons2021-02-152-2/+2
* mb/intel/wtm2: Switch to Lynxpoint GPIO macrosAngel Pons2021-02-151-97/+97
* soc/intel/broadwell/pch: Rename GPIO identifiersAngel Pons2021-02-151-1/+1
* ACPI: Move common _PIC methodKyösti Mälkki2021-02-141-5/+0
* haswell boards: Correct USB config indentationAngel Pons2021-02-121-40/+40
* haswell: Drop `mainboard_fill_pei_data`Angel Pons2021-02-121-8/+2
* mainboard: Drop unneeded `default_brightness_levels.asl`Angel Pons2021-02-122-2/+0
* sandybridge MRC boards: Drop channel disable masksAngel Pons2021-02-122-12/+0
* sb/intel/i82801jx: Drop Global NVS supportAngel Pons2021-02-111-1/+0
* ACPI: Move PICM declarationKyösti Mälkki2021-02-111-2/+0
* sb,soc/intel: Drop OSYS from GNVSKyösti Mälkki2021-02-112-9/+2
* mainboards: Drop PWRS from GNVSKyösti Mälkki2021-02-112-10/+0
* src: Remove unused <cpu/intel/model_206ax/model_206ax.h>Elyes HAOUAS2021-02-111-1/+0
* src: Remove unused <arch/cpu.h>Elyes HAOUAS2021-02-113-4/+2
* Revert "mb/intel/shadowmountain: Add the ASL code"Patrick Georgi2021-02-111-29/+0
* mb/intel/shadowmountain: Add the ASL codeV Sowmya2021-02-111-0/+29
* mb/intel/wtm2: Convert to ASL 2.0 syntaxElyes HAOUAS2021-02-101-22/+22
* nb/intel/sandybridge: Use common {DMI,EP,MCH}BAR accessorsAngel Pons2021-02-102-6/+6
* mb/intel/adlrvp/bootblock.c: Remove unused includesElyes HAOUAS2021-02-101-1/+0
* mb/intel/shadowmountain: Add bootblock and verstage codeV Sowmya2021-02-069-0/+282
* soc/intel/alderlake: Refactor PCIE port configEric Lai2021-02-051-28/+37
* src: Remove unused <cbfs.h>Elyes HAOUAS2021-02-041-1/+1
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