index
:
coreboot.git
24.02_branch
4.1
4.10_branch
4.11_branch
4.12_branch
4.14_branch
4.15_branch
4.16_branch
4.18_branch
4.19_branch
4.2
4.20_branch
4.22_branch
4.3
4.4
4.8_branch
classic-2014.10
coreboot-v1
coreboot-v3
main
master
rampayload
Coreboot firmware sources
coreboot
summary
refs
log
tree
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diff
stats
log msg
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committer
range
path:
root
/
src
/
mainboard
/
libretrend
/
lt1000
/
devicetree.cb
Commit message (
Expand
)
Author
Age
Files
Lines
*
soc/intel/skylake: Enable CIO depending on devicetree configuration
Felix Singer
2020-08-08
1
-1
/
+1
*
soc/intel/skylake: Enable SDXC depending on devicetree configuration
Felix Singer
2020-08-08
1
-1
/
+1
*
soc/intel/skylake: Enable thermal subsystem depending on devicetree
Felix Singer
2020-08-07
1
-1
/
+1
*
soc/intel/skylake: Enable HDA depending on devicetree configuration
Felix Singer
2020-07-29
1
-1
/
+0
*
soc/intel/skylake: Enable eMMC depending on devicetree configuration
Felix Singer
2020-07-29
1
-1
/
+0
*
soc/intel/skylake: Enable TraceHub depending on devicetree configuration
Felix Singer
2020-07-29
1
-1
/
+0
*
soc/intel/skylake: Enable SMBus depending on devicetree configuration
Felix Singer
2020-07-29
1
-1
/
+0
*
soc/intel/skylake: Enable LAN depending on devicetree configuration
Felix Singer
2020-07-29
1
-1
/
+0
*
soc/intel/skylake: Enable SATA depending on devicetree configuration
Felix Singer
2020-07-29
1
-1
/
+0
*
skylake boards: Factor out copy-pasted PIRQ routes
Angel Pons
2020-07-26
1
-9
/
+0
*
skylake: update processor power limits configuration
Sumeet R Pawnikar
2020-05-18
1
-1
/
+3
*
mb/libretrend/lt1000: Add Libretrend LT1000 mainboard
Michał Żygowski
2020-03-10
1
-0
/
+298
