index
:
coreboot.git
24.02_branch
4.1
4.10_branch
4.11_branch
4.12_branch
4.14_branch
4.15_branch
4.16_branch
4.18_branch
4.19_branch
4.2
4.20_branch
4.22_branch
4.3
4.4
4.8_branch
classic-2014.10
coreboot-v1
coreboot-v3
main
master
rampayload
Coreboot firmware sources
coreboot
summary
refs
log
tree
commit
diff
stats
log msg
author
committer
range
path:
root
/
src
/
mainboard
/
libretrend
Commit message (
Expand
)
Author
Age
Files
Lines
*
mainboard: Drop `SataMode` setting from Skylake devicetrees
Felix Singer
2021-12-12
1
-1
/
+0
*
soc/intel/skylake: switch to common GNVS
Michael Niewöhner
2021-10-17
1
-1
/
+1
*
Skylake boards: Drop setting useless `IRQ_SLOT_COUNT`
Angel Pons
2021-10-17
1
-4
/
+0
*
src/*: Specify type of `DIMM_MAX` once
Angel Pons
2021-09-03
1
-1
/
+0
*
src/*: Specify type of `DIMM_SPD_SIZE` once
Angel Pons
2021-09-03
1
-1
/
+0
*
soc/intel/common: Use CHIPSET_LOCKDOWN_COREBOOT by default
Felix Singer
2021-08-28
1
-5
/
+0
*
mb/*: Specify type of `MAINBOARD_PART_NUMBER` once
Angel Pons
2021-07-26
1
-1
/
+0
*
mb/*: Specify type of `MAINBOARD_DIR` once
Angel Pons
2021-07-26
1
-1
/
+0
*
src/*: Specify type of `CBFS_SIZE` once
Angel Pons
2021-07-26
1
-1
/
+0
*
mb/*: drop LPC generic range for port 80
Michael Niewöhner
2021-04-12
1
-1
/
+0
*
ACPI: Add top-level ASL
Kyösti Mälkki
2021-01-27
1
-0
/
+1
*
mb/libretrend/Kconfig: Remove duplicated string
Elyes HAOUAS
2021-01-25
1
-1
/
+0
*
soc/intel/skylake: Drop always-zero ProbelessTrace dt setting
Angel Pons
2020-12-14
1
-1
/
+0
*
soc/intel/{skl,cnl}: replace PM ACPI timer dt option by Kconfig
Michael Niewöhner
2020-11-13
2
-1
/
+3
*
mb/*,soc/intel: drop the obsolete dt option `speed_shift_enable`
Michael Niewöhner
2020-10-26
1
-3
/
+0
*
soc/intel,mb/*: get rid of legacy pad macros
Michael Niewöhner
2020-10-21
1
-82
/
+82
*
{src/mb,util/autoport}: Use macro for DSDT revision
Elyes HAOUAS
2020-10-13
1
-1
/
+1
*
soc/intel/common/block/acpi: Factor out common platform.asl
Subrata Banik
2020-10-05
1
-1
/
+1
*
soc/intel/skylake: Enable CIO depending on devicetree configuration
Felix Singer
2020-08-08
1
-1
/
+1
*
soc/intel/skylake: Enable SDXC depending on devicetree configuration
Felix Singer
2020-08-08
1
-1
/
+1
*
soc/intel/skylake: Enable thermal subsystem depending on devicetree
Felix Singer
2020-08-07
1
-1
/
+1
*
soc/intel/skylake: Enable HDA depending on devicetree configuration
Felix Singer
2020-07-29
1
-1
/
+0
*
soc/intel/skylake: Enable eMMC depending on devicetree configuration
Felix Singer
2020-07-29
1
-1
/
+0
*
soc/intel/skylake: Enable TraceHub depending on devicetree configuration
Felix Singer
2020-07-29
1
-1
/
+0
*
soc/intel/skylake: Enable SMBus depending on devicetree configuration
Felix Singer
2020-07-29
1
-1
/
+0
*
soc/intel/skylake: Enable LAN depending on devicetree configuration
Felix Singer
2020-07-29
1
-1
/
+0
*
soc/intel/skylake: Enable SATA depending on devicetree configuration
Felix Singer
2020-07-29
1
-1
/
+0
*
skylake boards: Factor out copy-pasted PIRQ routes
Angel Pons
2020-07-26
1
-9
/
+0
*
skylake: update processor power limits configuration
Sumeet R Pawnikar
2020-05-18
1
-1
/
+3
*
treewide: Remove "this file is part of" lines
Patrick Georgi
2020-05-11
7
-7
/
+0
*
acpi: Move ACPI table support out of arch/x86 (3/5)
Furquan Shaikh
2020-05-02
1
-1
/
+1
*
fsp2_0: Clean up around `config FSP_USE_REPO`
Nico Huber
2020-04-05
1
-8
/
+0
*
mb/libretrend/lt1000: Add Libretrend LT1000 mainboard
Michał Żygowski
2020-03-10
16
-0
/
+732
