| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | RISC-V boards: Remove PAGETABLES section from memlayout.ld | Jonathan Neuschäfer | 2018-04-27 | 1 | -1/+1 |
| * | RISC-V boards: Stop using the config string | Jonathan Neuschäfer | 2017-11-07 | 1 | -2/+3 |
| * | mb/lowrisc/nexys4ddr: Read RAM information from the config string | Jonathan Neuschäfer | 2016-12-06 | 1 | -5/+5 |
| * | mb/lowrisc/nexys4ddr: Initialize CBMEM in romstage | Jonathan Neuschäfer | 2016-12-06 | 1 | -0/+3 |
| * | riscv: Unify SBI call implementations under arch/riscv/ | Jonathan Neuschäfer | 2016-11-07 | 3 | -107/+0 |
| * | mb/lowrisc/nexys4ddr: Actually fix the UART clock setup | Jonathan Neuschäfer | 2016-11-07 | 2 | -12/+2 |
| * | riscv: add the lowrisc/nexys4ddr mainboard | Ronald G. Minnich | 2016-10-28 | 13 | -0/+367 |
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| Coreboot firmware sources | coreboot |
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