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path: root/src/mainboard/ocp/tiogapass
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* mb/{google,ocp}: Remove unused <bootstate.h>Elyes Haouas2022-05-161-1/+0
* mb/ocp, soc/intel/xeon_sp: Use common ASL POST definesAngel Pons2022-05-041-7/+1
* pci_mmio_cfg: Always use pci_s_* functionsNico Huber2021-11-091-1/+1
* mb/ocp: Remove superfluous FSP header CPP inclusionArthur Heymans2021-09-091-1/+0
* soc/intel/common: Use CHIPSET_LOCKDOWN_COREBOOT by defaultFelix Singer2021-08-281-4/+0
* mb/*: Specify type of `FMDFILE` onceAngel Pons2021-07-261-1/+0
* mb/*: Specify type of `MAINBOARD_PART_NUMBER` onceAngel Pons2021-07-261-1/+0
* mb/*: Specify type of `MAINBOARD_DIR` onceAngel Pons2021-07-261-1/+0
* mainboard/ocp/tiogapass: Remove redundant PARALLEL_MP_AP_WORKMarc Jones2021-04-191-1/+0
* mb/ocp/tiogapass: use IPMI driver functionality for "POST complete"Michael Niewöhner2021-04-062-10/+4
* mb/ocp/tiogapass: correct "POST complete" pad initial valueMichael Niewöhner2021-04-061-1/+1
* mainboard/: Register chipset_lockdown on xeon_sp mainboardsMarc Jones2021-03-201-0/+4
* ACPI: Move common _PIC methodKyösti Mälkki2021-02-141-14/+0
* ipmi/ocp: Move common OCP/Facebook IPMI OEM codes into drivers/ipmi/ocpJohnny Lin2021-02-016-40/+9
* ACPI: Add top-level ASLKyösti Mälkki2021-01-271-0/+1
* mb/ocp/tiogapass/ramstage.c: Remove duplicated includeElyes HAOUAS2021-01-181-1/+0
* soc/intel: Replace acpi_init_gnvs()Kyösti Mälkki2021-01-101-6/+0
* mb/x/acpi_tables: Rename to mainboard_fill_gnvs()Kyösti Mälkki2021-01-101-1/+1
* mb/ocp/tiogapass/devicetree.cb: Add P2SB deviceArthur Heymans2020-12-161-0/+1
* soc/intel/xeon_sp/nvs: Use common global NVSMarc Jones2020-12-101-1/+1
* mainboard/ocp/tiogapass: Add xeon_sp pch.aslMarc Jones2020-11-071-0/+4
* mainboard/ocp/tiogapass: Set longer BMC timeoutMarc Jones2020-11-071-1/+1
* mb/ocp/tiogapass: Convert to ASL 2.0 syntaxElyes HAOUAS2020-11-041-4/+4
* mb/ocp/tiogapass/dsdt: Remove unnecessary commentsMaxim Polyakov2020-10-281-4/+0
* mb/ocp/tiogapass/acpi: Exclude uncore.asl from _SB scopeMaxim Polyakov2020-10-281-5/+1
* {src/mb,util/autoport}: Use macro for DSDT revisionElyes HAOUAS2020-10-131-1/+1
* soc/intel/xeon_sp: Use common ASL code for xeon_spMarc Jones2020-10-031-2/+2
* src/mainboard: Remove unused include <device/pnp_ops.h>Elyes HAOUAS2020-09-141-1/+0
* mb/ocp/tiogapass: Add SMBIOS type8 data tableBryantOu2020-07-301-0/+141
* mb/ocp/tiogapass: Configure IPMI FRB2 watchdog timer via VPD variablesJohnny Lin2020-07-297-2/+67
* mb/ocp/tiogapass/gpio: undo set trig and bufdis for NF padsMaxim Polyakov2020-07-261-66/+66
* mb/x/acpi_tables: Do minor cleanup on includesKyösti Mälkki2020-07-261-4/+1
* mb/ocp/tiogapass: Use macro to configure IIOMaxim Polyakov2020-07-241-41/+38
* mb/ocp/tiogapass: Populate SMBIOS data and set the read PPIN to BMCJohnny Lin2020-07-245-2/+92
* ACPI: Drop typedef global_nvs_tKyösti Mälkki2020-06-301-1/+2
* Kconfig: Escape variable to accommodate new Kconfig versionsPatrick Georgi2020-06-191-1/+1
* acpi: Rename motherboard_fill_fadt() to mainboard_fill_fadt()Kyösti Mälkki2020-06-071-1/+1
* mb/*: Remove some fadt.c filesKyösti Mälkki2020-06-073-11/+5
* treewide: Remove "this file is part of" linesPatrick Georgi2020-05-1112-12/+0
* src/mainboard: Replace GPLv2 long form headers with SPDX headerElyes HAOUAS2020-05-103-39/+3
* treewide: replace GPLv2 long form headers with SPDX headerPatrick Georgi2020-05-066-72/+6
* treewide: Move "is part of the coreboot project" line in its own commentPatrick Georgi2020-05-066-12/+6
* acpi: Move ACPI table support out of arch/x86 (3/5)Furquan Shaikh2020-05-022-2/+2
* md/tiogapass: move all *.h to dir and make them globalMaxim Polyakov2020-05-015-4/+3
* xeon_sp, ocp/tiogapass: remove unused FSP-style GPIO defsMaxim Polyakov2020-05-011-1017/+0
* mb/ocp/tiogapass: fix advanced _PAD_CFG_STRUCT macros in configMaxim Polyakov2020-05-011-10/+10
* mb/ocp/tiogapass: rework GPIOs configuration using macrosMaxim Polyakov2020-05-011-242/+242
* mb/tiogapass: use common driver to configure GPIOMaxim Polyakov2020-05-013-12/+552
* mb/ocp/tiogapass: Update UPD IIO bifurcation at run-timeJohnny Lin2020-05-012-1/+35
* mb/ocp/tiogapass: Implement port 80h direct to GPIO and init UART pinsBryantOu2020-04-301-1/+12
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