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path: root/src/mainboard/siemens
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* mb/samsung to mb/up: Add SPDX license headers to Kconfig filesMartin Roth2024-02-1821-0/+34
* device/device.h: Rename busses for clarityArthur Heymans2024-01-316-15/+15
* mb/siemens/mc_ehl3: Use PSE GbE 0 instead of PSE GbE 1Jan Samek2024-01-272-38/+38
* mb/siemens/mc_ehl5: Set LVDS re-power delay to 1 sMario Scheithauer2024-01-271-2/+2
* src, util: Clean up makefile.inc in text, help & commentsMartin Roth2024-01-261-1/+1
* mb/lenovo to mb/squared: Rename Makefiles from .inc to .mkMartin Roth2024-01-2420-0/+0
* mb/siemens/chili: Use chipset dt reference namesFelix Singer2024-01-192-138/+138
* soc/intel/elkhartlake: Drop redundant PcieRpEnableNico Huber2024-01-176-25/+0
* mb/siemens/mc_ehl: Enable write access for SPD EEPROM on mc_ehl1Werner Zeh2023-11-301-0/+4
* mb/siemens/{mc_ehl3,mc_ehl5}: Fix GPIO settings for latest HW revisionMario Scheithauer2023-11-102-2/+2
* mb/siemens: Move selects from Kconfig.name to KconfigFelix Singer2023-10-036-13/+39
* mb/siemens/mc_ehl3: Enable PWM passthrough mode on PTN3460Mario Scheithauer2023-09-141-0/+2
* mb/siemens/mc_ehl5: Enable PWM passthrough mode on PTN3460Mario Scheithauer2023-09-131-0/+2
* mb/siemens/fa_ehl: Process LPDDR4 SPD files and add MT53E512M32D1NP SPDJohannes Hahn2023-09-052-0/+36
* mb/siemens/mc_apl2: Set Full Reset Bit into Reset Control RegisterMario Scheithauer2023-09-021-0/+6
* mb/siemens/fa_ehl: Remove RTC RV3028C7Johannes Hahn2023-08-242-15/+1
* mb/siemens/fa_ehl: Remove TPMJohannes Hahn2023-08-242-10/+1
* mb/siemens/fa_ehl: Remove NC_FPGAJohannes Hahn2023-08-241-2/+0
* mainboard/siemens/fa_ehl: Add new mainboard based on mc_ehl2Johannes Hahn2023-08-2416-0/+897
* mainboard: Add SPDX license headers to MakefilesMartin Roth2023-08-069-0/+17
* mb/siemens/mc_ehl4: Change GPIO GPP_B5 polarity for DRAM populationMario Scheithauer2023-07-131-1/+1
* mb/siemens/mc_ehl4: Make DRAM population depending on GPIO GPP_B5Mario Scheithauer2023-07-062-0/+9
* mb/siemens/mc_ehl: Make DRAM population configurableMario Scheithauer2023-07-062-1/+9
* mb/siemens/mc_ehl3/devicetree.cb: Disable USB 3.0 port 0Jan Samek2023-07-031-2/+2
* mb/siemens/mc_apl1: Fix wrong register maskingMario Scheithauer2023-07-031-2/+3
* mb/siemens/mc_apl5: Correct the Tx signal from SATA port 0Mario Scheithauer2023-07-031-0/+11
* mb/siemens/mc_apl1: Rename macro 'TX_DWORD3' to 'TX_DWORD3_P1'Mario Scheithauer2023-07-031-3/+3
* mb/siemens/{mc_apl3,mc_apl5,mc_apl6}: Remove TX_DWORD3 macroMario Scheithauer2023-07-033-11/+0
* soc/intel/apollolake: Switch to snake case for DisableSataSalpSupportMario Scheithauer2023-06-197-7/+7
* mb/siemens/mc_ehl3/devicetree.cb: Disable USB 3.0 port 1Jan Samek2023-06-151-2/+2
* soc/intel/apollolake: Switch to snake case for SataPortsEnableMario Scheithauer2023-06-026-12/+12
* mb/siemens/{mc_apl2,mc_apl5,mc_apl6}: Use SSD type for SATA portsMario Scheithauer2023-06-013-0/+6
* mb/siemens/{mc_apl2,mc_apl5,mc_apl6}: Limit SATA speed to Gen 2Mario Scheithauer2023-06-013-0/+3
* mb/siemens/mc_ehl1: Enable pi608gp I2C driverJan Samek2023-05-242-0/+10
* mb/siemens/mc_ehl4: Double payload size to 256 bytes for PCIe RP #2, #3Mario Scheithauer2023-05-241-0/+3
* mb/siemens/mc_ehl5: Add PTN3460 eDP-to-LVDS bridgeMario Scheithauer2023-05-125-3/+105
* mb/siemens/mc_ehl5: Add new board variant based on mc_ehl2Mario Scheithauer2023-05-128-0/+564
* mb/siemens/mc_apl5: Set Full Reset Bit into Reset Control RegisterMario Scheithauer2023-05-111-0/+6
* mb/siemens/mc_apl: Correct multi-line comment style for all Siemens APL BoardsMario Scheithauer2023-05-1114-231/+153
* mb/siemens/mc_ehl: Remove '_' from mainboard model option in Kconfig.nameMario Scheithauer2023-05-111-2/+2
* mb/siemens/mc_ehl1: Use SSD type for SATA portsMario Scheithauer2023-05-111-0/+2
* mb/siemens/mc_ehl: Remove subdir 'spd' from MakefileMario Scheithauer2023-05-041-2/+0
* mb/siemens/mc_ehl: Remove wrong comment regarding spd.binWerner Zeh2023-05-011-2/+1
* mb/siemens/mc_ehl4: Enable SD cardMario Scheithauer2023-04-263-0/+43
* mb/siemens/mc_ehl4: Switch RTC type and connectionMario Scheithauer2023-04-262-19/+16
* mb/siemens/mc_ehl4: Adjust USB settingsMario Scheithauer2023-04-261-4/+4
* mb/siemens/mc_ehl4: Change NC FPGA PCIe RP connection for POST codesMario Scheithauer2023-04-261-1/+1
* mb/siemens/mc_ehl4: Adjust GPIOsMario Scheithauer2023-04-261-47/+7
* mb/siemens/mc_ehl2: Fix GPIO settings for latest HW revisionMario Scheithauer2023-04-111-2/+2
* soc/intel/elkhartlake: Define DIMM_SPD_SIZE in SoC KconfigMichał Żygowski2023-03-231-3/+0
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