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path: root/src/mainboard/siemens/mc_apl1/variants
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* mb/siemens/mc_apl7: Disable VBOOT and TPMUwe Poeche2022-06-272-22/+2
* mb/siemens/mc_apl1: Add new mainboard variant mc_apl7Uwe Poeche2022-06-236-0/+677
* soc/intel/apollolake: Hook Up SataPortEnable to devicetreeSean Rhodes2022-06-206-0/+12
* intel/common/block: Provide RAPL and min clock ratio switches in commonUwe Poeche2022-05-185-5/+5
* tpm: Refactor TPM Kconfig dimensionsJes B. Klinke2022-04-214-4/+4
* src: Make PCI ID define names shorterFelix Singer2022-03-075-14/+14
* mb/siemens/mc_apl2: Enable PCI device for I2C bus 0Werner Zeh2022-02-221-1/+1
* mb/siemens/mc_apl{2,4,5,6}: Enable recovery MRC cacheWerner Zeh2022-02-124-0/+4
* mb/siemens/{mc_apl1,...,mc_apl6}: Disable SATA ALPM supportMario Scheithauer2022-02-016-6/+18
* mb/*: Specify type of `FMDFILE` onceAngel Pons2021-07-264-4/+0
* mb/siemens/mc_apl{1,2,3,5,6}: Use PCI_ALLOW_BUS_MASTER_ANY_DEVICEWerner Zeh2021-07-234-4/+4
* mb/siemens/mc_apl{1,2,3,5,6}: Set PCI bus master bit only if allowedWerner Zeh2021-07-214-10/+15
* mb/siemens/mc_apl2: Disable unused I2C controllersWerner Zeh2021-06-041-7/+7
* mb/siemens/mc_apl{1,2,3,5,6}: Provide I2C timings for 400 kHzWerner Zeh2021-06-045-5/+35
* mb/siemens/mc_apl{1,2,3,5,6}: Disable ACPI-support for RX6110Werner Zeh2021-05-305-0/+5
* mb/siemens/mc_apl1: Move gpio.c from baseboard to mc_apl1Mario Scheithauer2021-05-303-3/+3
* mb/siemens/{mc_apl2,...,mc_apl6}: Do early UART pad configurationMario Scheithauer2021-05-305-0/+16
* mb/siemens/mc_apl{1,2,3,5,6}: Tune I2C frequencyWerner Zeh2021-05-025-1/+44
* mb/siemens/mc_apl1/variants/mc_apl2/mainboard.c: Clean includesElyes HAOUAS2021-02-161-5/+1
* src/mb: Remove unused <console/console.h>Elyes HAOUAS2021-02-155-5/+0
* mb/siemens/mc_apl2: Switch I2C bus for RX6110SAMario Scheithauer2021-02-101-4/+4
* mb/siemens/mc_apl1: do UART pad configuration at board-levelMichael Niewöhner2021-02-021-0/+3
* mb/siemens/{mc_apl1,...,mc_apl6}: Configure FSP-S UPDsMario Scheithauer2021-01-206-86/+140
* mb/siemens/mc_apl1: do LPC/eSPI pad configuration at board-levelMichael Niewöhner2021-01-156-6/+8
* mb/siemens/mc_apl1: Deduplicate wait_for_legacy_dev()Angel Pons2020-11-305-141/+0
* mb/siemens/mc_apl1: Use `pci_or_config16` functionAngel Pons2020-11-234-16/+4
* mb/siemens/mc_apl6: Enable eMMCMario Scheithauer2020-10-051-1/+4
* apollolake boards: Enable CSE in devicetreeSubrata Banik2020-09-196-0/+6
* mb/siemens/mc_apl2/gpio: Fix code styleMaxim Polyakov2020-09-101-114/+57
* mb/siemens/mc_apl2/gpio: Undo set DRIVER for GPOMaxim Polyakov2020-09-101-18/+18
* src: Remove whitespaces before tabsElyes HAOUAS2020-06-303-3/+3
* Kconfig: Escape variable to accommodate new Kconfig versionsPatrick Georgi2020-06-194-4/+4
* treewide: Remove "this file is part of" linesPatrick Georgi2020-05-1117-17/+0
* mainboard/siemens: Use SPDX for GPL-2.0-only filesAngel Pons2020-04-0417-221/+34
* security/vboot: Decouple measured boot from verified bootBill XIE2020-03-314-4/+4
* mainboard/[^a-p]*: Remove copyright noticesPatrick Georgi2020-03-1817-26/+0
* src/mainboard/siemens: Use PTN3460 chip driverUwe Poeche2019-11-1221-877/+353
* mb/siemens/mc_apl6: Enable VT-d featureWerner Zeh2019-11-121-0/+3
* mb/siemens/mc_apl6: Add TPM to devicetreeWerner Zeh2019-11-111-1/+5
* mb/siemens/mc_apl6: Enable SDHCI and disable eMMC controllerWerner Zeh2019-11-111-34/+2
* mb/siemens/mc_apl6: Adjust clock lines used on PCIe-2-PCI bridgeWerner Zeh2019-11-111-2/+2
* mb/siemens/mc_apl6: Enable VBOOT per defaultWerner Zeh2019-11-112-1/+17
* mb/siemens/mc_apl6: Add new mainboard based on mc_apl3Werner Zeh2019-11-115-0/+657
* mb/siemens/mc_apl{3,5}: Remove __weak symbol from GPIO functionsWerner Zeh2019-10-182-6/+4
* mb/siemens/mc_apl{2,4,5}: Enable VBOOTWerner Zeh2019-09-253-0/+48
* mb/siemens/mc_apl5: Disable IGD if no EDID data availableMario Scheithauer2019-09-051-0/+25
* mb/siemens/{mc_apl1,...,mc_apl5}: Fix GPIO settingsMario Scheithauer2019-07-184-23/+23
* mb/siemens/mc_apl1: Disable all UHS-I SD-Card speed modesMario Scheithauer2019-07-181-19/+0
* mb/siemens/mc_apl3: Enable LPSS UART 1Mario Scheithauer2019-07-121-2/+3
* mb/siemens/{baseboard,mc_apl3,mc_apl4,mc_apl5}: Fix GPIO_168Mario Scheithauer2019-07-114-4/+4