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* mb/starlabs/starbook: Adjust TCC Offset for all boardsSean Rhodes2023-07-282-6/+6
| | | | | | | | | | | Lower the TCC Offset by 10 degress. Change-Id: Ib80d3b73c41ec1196d8294c35b43333e0df218d5 Signed-off-by: Sean Rhodes <sean@starlabs.systems> Reviewed-on: https://review.coreboot.org/c/coreboot/+/76374 Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* mainboard/starlabs/*: Remove the power_on_after_fail optionSean Rhodes2023-07-068-20/+0
| | | | | | | | | | | None of these boards have an RTC battery, so this option has no effect. Remove it. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I9a55227f74c0b9ae9b56bdef4b8f53b2425b331c Reviewed-on: https://review.coreboot.org/c/coreboot/+/75450 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
* mainboard/starlabs/starbook: Unselect RESIZABLE_BARSSean Rhodes2023-07-061-4/+0
| | | | | | | | | | | | It is not needed, so remove it. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I606d0a76926e90e4ce321163400aa50ea961c2a0 Reviewed-on: https://review.coreboot.org/c/coreboot/+/75342 Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
* soc/intel/apollolake: Switch to snake case for ModPhyIfValueMario Scheithauer2023-06-192-2/+2
| | | | | | | | | | | For a unification of the naming convension, change from pascal case to snake case style for parameter 'ModPhyIfValue'. Change-Id: I4cdf68e65cea4ab316af969cd6a8d096b456518d Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/75855 Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* soc/intel/apollolake: Switch to snake case for DisableComplianceModeMario Scheithauer2023-06-192-2/+2
| | | | | | | | | | | For a unification of the naming convension, change from pascal case to snake case style for parameter 'DisableComplianceMode'. Change-Id: I9d5605134a753f161a66857c7f78844ae7490cd6 Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/75854 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
* mb/starlabs/starbook: Fix the ramtop CMOS entrySean Rhodes2023-06-032-6/+6
| | | | | | | | | | | The ramtop entry has to be 10 bytes long, and it was incorrectly set to 10 bits, instead of 10 bytes. Change this to 80. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I506f9d98a389dd859038fd270c5e344b65f514f8 Reviewed-on: https://review.coreboot.org/c/coreboot/+/75420 Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* soc/intel/apollolake: Switch to snake case for SataPortsEnableMario Scheithauer2023-06-022-2/+2
| | | | | | | | | | | | | For a unification of the naming convension, change from pascal case to snake case style for parameter 'SataPortsEnable'. Change-Id: I0df35125360eb42a03d5445011d72842cb2b8d7e Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/75553 Reviewed-by: Himanshu Sahdev <himanshu.sahdev@intel.com> Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jan Samek <jan.samek@siemens.com>
* mb/starlabs/starbook: Add ramtop to CMOS layoutSean Rhodes2023-05-232-0/+6
| | | | | | | | | | | Add `ramtop` to CMOS layout so SOC_INTEL_COMMON_BASECODE_RAMTOP can be used. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I88128d2c62bdc3246a3f30e768c353f0fe3faeb7 Reviewed-on: https://review.coreboot.org/c/coreboot/+/74432 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
* mb/starlabs/starbook: Let coreboot configure ASPMSean Rhodes2023-04-292-25/+0
| | | | | | | | | | | | | FSP is fractionally faster at configuring ASPM (1,118,688 vs 1,122,205) but coreboot's configuration results in lower power consumption of approximately 0.5W when idling - the reason why is unknown. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: Ib15eaede956f0aa55118d093fdff0fd9487df250 Reviewed-on: https://review.coreboot.org/c/coreboot/+/74520 Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* mb/starlabs/starbook/adl: Correct the number of NID entriesSean Rhodes2023-04-281-2/+2
| | | | | | | | | | | | The number of NID entries was too high for the Realtek and Intel sound cards, preventing the verb table from loading. Now the values are correct; it loads as intended. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I79825313a4801c120a0a2a321cbabab7c728aa71 Reviewed-on: https://review.coreboot.org/c/coreboot/+/74241 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
* mb/starlabs/starbook/adl: Correct port for Hot PlugSean Rhodes2023-04-281-1/+1
| | | | | | | | | | | | | | Commit 5103b87a4d7b ("mb/starlabs/starbook/adl: Add an option to enable Hot Plug") introduced an option to enable Hot Plug for the SSD. The port was set to 4 (RP5) which is the wireless card. Change this to 8 (RP9) which is the SSD. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I884f4997d73e31bd422477952466f168afad66a1 Reviewed-on: https://review.coreboot.org/c/coreboot/+/74738 Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
* soc/intel/tigerlake: Replace TcssD3ColdDisable with D3COLD_SUPPORTSean Rhodes2023-04-202-2/+0
| | | | | | | | | | | | | Remove the `TcssD3ColdDisable` option in devicetree, as it exists in Kconfig. The setting is only used on `starlabs/starbook` which selects D3COLD_SUPPORT so the UPDs will not change. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I50e49e900c96748edd5b678765e47cc0e0d9b280 Reviewed-on: https://review.coreboot.org/c/coreboot/+/74476 Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Michael Niewöhner <foss@mniewoehner.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* soc/intel/tigerlake: Replace SOC_INTEL_TIGERLAKE_S3 with D3COLD_SUPPORTSean Rhodes2023-04-201-1/+0
| | | | | | | | | | | | | | | The Kconfig option SOC_INTEL_TIGERLAKE_S3 suggests that it's doing something with S3, but it's actually disabling D3Cold support. Remove it, and instead use D3COLD_SUPPORT so it's clear what the option is doing. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: Id43f3e5c8620d474831cc02fcecebd8aac961687 Reviewed-on: https://review.coreboot.org/c/coreboot/+/74405 Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Michael Niewöhner <foss@mniewoehner.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* soc/intel/alderlake: Rename SOC_INTEL_ALDERLAKE_S3 to D3COLD_SUPPORTSean Rhodes2023-04-191-1/+3
| | | | | | | | | | | | | | | The Kconfig option SOC_INTEL_ALDERLAKE_S3 suggests that it's doing something with S3, but it's actually disabling D3Cold support. Rename it to D3COLD_SUPPORT to make it clear what it's doing. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: Ifc3f19912ac7ee55be8ec7a491598140f9532675 Reviewed-on: https://review.coreboot.org/c/coreboot/+/74403 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com> Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
* Revert "soc/intel/{tgl,adl}: Hook up D3ColdEnable UPD to D3COLD_SUPPORT"Michael Niewöhner2023-04-122-1/+3
| | | | | | | | | | | | This reverts commit 6bfca1b689e48be4f72e8fa401f3558d845fc282. Reason for revert: dependency for revert CB:73903 Change-Id: I56bab4d85d04e90cacfe77db59d0cde6a8a75949 Signed-off-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/73902 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Singer <felixsinger@posteo.net>
* mb/starlabs/starbook/adl: Enable OverCurrent 3 GPIOSean Rhodes2023-04-121-1/+1
| | | | | | | | | Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I9971209539aa7b74e55673141902b6ad0d698e4f Reviewed-on: https://review.coreboot.org/c/coreboot/+/73985 Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* mb/starlabs/starbook/adl: Fix OC pin configSean Rhodes2023-04-121-5/+5
| | | | | | | | Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I1c4bdab44f0d73546f52614917dccbe71f0911a3 Reviewed-on: https://review.coreboot.org/c/coreboot/+/73984 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* mb/starlabs/*: Add CMOS entries for the mirror flagSean Rhodes2023-04-048-0/+12
| | | | | | | | | | | Add the required CMOS entries for the mirror flag, so that it can be enabled from a defconfig. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I174ac896df050480ee90c8141c5536b628c98432 Reviewed-on: https://review.coreboot.org/c/coreboot/+/73682 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* mb/starlabs/starbook/adl: Add an option to enable Hot PlugSean Rhodes2023-04-044-0/+18
| | | | | | | | | | | | | | | Some third-party SSDs, from Samsung and WD, such as the 990 Pro and WD Black 850X aren't initialised by coreboot, seemingly as coreboot is too quick; debug builds work, and enabling hotplug does. Add a cmos option `pci_hot_plug`, defaulting to enabled to allow these SSDs to work. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I680211bc87153a5e6005d58040a94725c0973451 Reviewed-on: https://review.coreboot.org/c/coreboot/+/73092 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* mb/starlabs/starbook: Disable ASPM in corebootSean Rhodes2023-04-041-0/+21
| | | | | | | | | | | | ASPM is already configured by FSP so disable it in coreboot to reduce boot time by a whopping 34ms. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I073c68dafa9baa90e253b5230f84b0de6a7e5c47 Reviewed-on: https://review.coreboot.org/c/coreboot/+/73982 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jakub Czapiga <jacz@semihalf.com>
* mb/starlabs/starbook/adl: Remove Soundwire workaroundSean Rhodes2023-04-041-29/+0
| | | | | | | | | | | | This was added to solve Debian 10 not booting. Debian 10, which now isn't the latest stable version works, so remove the workaround that was included in the original port. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: Ic11f355eb218ff3bad00fff83537c99c1b6985bc Reviewed-on: https://review.coreboot.org/c/coreboot/+/72669 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* Revert "mb/starlabs/*: Remove sleepstates.asl"Sean Rhodes2023-04-042-0/+4
| | | | | | | | | | | | | | | | This reverts commit ac69ce91229dee68d4135c596f49cf9e5efbe1e9. Reason for revert: Removing breaks suspend in kernels > 6.2 and Windows. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I3e90266e66192b328b9af51c5e614774a248ddf0 Reviewed-on: https://review.coreboot.org/c/coreboot/+/73894 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Maximilian Brune <maximilian.brune@9elements.com> Reviewed-by: Benjamin Doron <benjamin.doron00@gmail.com>
* soc/intel/alderlake: Add ADL-P 4+4 with 28W TDPPatrick Rudolph2023-04-021-1/+1
| | | | | | | | | | | | | | | | | | | Add the 28W TDP version of the ADL-P with MCHID 0x4629. Verified that all 28W SoCs have the same PL1/PL2 defined in Intel document #655258 "12th Generation Intel Core Processors Datasheet, Volume 1 of 2". Fixes the error seen in coreboot log: [ERROR] unknown SA ID: 0x4629, skipped power Limit Configuration Change-Id: Iad676f083dfd1cceb4df9435d467dc0f31a63f80 Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/74116 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com> Reviewed-by: Sean Rhodes <sean@starlabs.systems> Reviewed-by: Maximilian Brune <maximilian.brune@9elements.com>
* mb/starlabs/*: Remove sleepstates.aslSean Rhodes2023-03-262-4/+0
| | | | | | | | | | | Remove the sleepstates.asl as it was written for SOCs pre-Skylake and not needed. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I46fe934c2a50b3d61575f66f0881ab6754fe8dc9 Reviewed-on: https://review.coreboot.org/c/coreboot/+/73948 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
* mb/starlabs/starbook/adl: Enable ASPMSean Rhodes2023-03-101-0/+5
| | | | | | | | | | Enable ASPM for RP5 (wireless) and RP9 (SSD). Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I428040caf171bdcfedc285cdeddc55bcbec40f3c Reviewed-on: https://review.coreboot.org/c/coreboot/+/72753 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* mb/starlabs/starbook/{tgl,adl}: Set DmiMaxLinkSpeed to 4Sean Rhodes2023-03-102-0/+3
| | | | | | | | | | | Set DmiMaxLinkSpeed to 4 in FSP to ensure that FSP always supports PCIe Gen 4 drives. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I0e31919122dacfbdc2486fa8216a28b479f3bd00 Reviewed-on: https://review.coreboot.org/c/coreboot/+/72012 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* Revert "ec/starlabs/merlin: Add support for enabling the mirror flag"Sean Rhodes2023-03-091-1/+0
| | | | | | | | | | | | | | | | | | | This reverts commit b42ca4d0b2fafe7214396d30a1a833ac33cf85bc. Reason for revert: The mirror flag "0x01" is mirror once, which relies on the EC remembering that it's been mirrored. However, the EC forgets this if it's been without power for 20 minutes or so. Even if power is connected then, it'll instantly try to mirror and it can't charge whilst doing it. It can either result in incomplete EC firmware, or a loop where it's constantly trying to mirror. Change-Id: I79da9143cc63459e7e29431eff2cb14200424b37 Signed-off-by: Sean Rhodes <sean@starlabs.systems> Reviewed-on: https://review.coreboot.org/c/coreboot/+/72678 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* Revert "mb/starlabs/*: Enable the Mirror flag for boards that support"Sean Rhodes2023-03-095-6/+0
| | | | | | | | | | | | | | | | | | | This reverts commit 35354583cdc94ced026975ced5170e1c094b258e. Reason for revert: The mirror flag "0x01" is mirror once, which relies on the EC remembering that it's been mirrored. However, the EC forgets this if it's been without power for 20 minutes or so. Even if power is connected then, it'll instantly try to mirror and it can't charge whilst doing it. It can either result in incomplete EC firmware, or a loop where it's constantly trying to mirror. Change-Id: Ie82cbafd4bea2416526e2847738802a05ed45582 Signed-off-by: Sean Rhodes <sean@starlabs.systems> Reviewed-on: https://review.coreboot.org/c/coreboot/+/72677 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* mb/starlabs/starbook/adl: Enable the PchHdaAudioLinkHdaEnable UPDSean Rhodes2023-03-021-3/+4
| | | | | | | | | | Enable the PchHdaAudioLinkHdaEnable UPD so that the sound works. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: Ie3493af340a42035ee537d83b1542be1b87d8f9c Reviewed-on: https://review.coreboot.org/c/coreboot/+/71979 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com>
* soc/intel/{tgl,adl}: Hook up D3ColdEnable UPD to D3COLD_SUPPORTSean Rhodes2023-02-202-3/+1
| | | | | | | | | | | Select NO_S0IX_SUPPORT for `starlabs/starbook` and `atlas/prodrive` so their configurations are unchanged. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I718952165daa6471f11e8025e745fe7c249d3b46 Reviewed-on: https://review.coreboot.org/c/coreboot/+/72800 Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* treewide: Remove useless "_STA: Status" commentElyes Haouas2023-02-191-1/+1
| | | | | | | | | Change-Id: I99ded00fa6dadb494c1523d00063dbc1fde95614 Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/73093 Reviewed-by: Tim Crawford <tcrawford@system76.com> Reviewed-by: Felix Singer <felixsinger@posteo.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* treewide: Remove unuseful "_UID: Unique ID" commentElyes Haouas2023-02-171-1/+1
| | | | | | | | Change-Id: I150a4ed94bcaead6eb45f1c4b4952ae6957e0940 Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/72663 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Singer <felixsinger@posteo.net>
* treewide: Remove unuseful "_CID: Compatible ID" commentElyes Haouas2023-02-171-1/+1
| | | | | | | | Change-Id: I7db69e2faf412b9c6732f6dfc362d5774094ef27 Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/72662 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Singer <felixsinger@posteo.net>
* treewide: Remove unuseful "_HID: Hardware ID" commentElyes Haouas2023-02-171-1/+1
| | | | | | | | | | Change-Id: I5eb1424e9e6c1fbf20cd0bf68fbb52e1ec97f905 Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/72661 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Crawford <tcrawford@system76.com> Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Felix Singer <felixsinger@posteo.net>
* mb/starlabs/starbook/adl: Enable HPD GPIOSean Rhodes2023-02-041-1/+1
| | | | | | | | | | | Enable the HPD GPIO so that the USB-C port can be used for DisplayPort. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: If93d08f64cf7b09bb47622bdc7f22280b8a48174 Reviewed-on: https://review.coreboot.org/c/coreboot/+/72431 Reviewed-by: Matt DeVillier <matt.devillier@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* soc/intel/apl: Move cpu cluster to chipset.cbArthur Heymans2023-02-032-2/+0
| | | | | | | | | Change-Id: I7eaf625e5acfcefdae7c81e186de36b42c06ee67 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/72704 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com> Reviewed-by: Sean Rhodes <sean@starlabs.systems>
* mb/*: Remove lapic from devicetreeArthur Heymans2023-01-306-18/+6
| | | | | | | | | | | | The parallel mp code picks up lapics at runtime, so remove it from all devicetrees that use this codebase. Change-Id: I5258a769c0f0ee4bbc4facc19737eed187b68c73 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69303 Reviewed-by: Elyes Haouas <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
* mb/starlabs/starbook/adl: Fix the disable wireless CMOS optionSean Rhodes2023-01-272-4/+6
| | | | | | | | | | | | | | | The current CMOS option causes Linux to not boot, as the GRUB EFI loader will report an incorrect parameter. Update the CMOS option so that the corresponding UPD is changed when the wireless is set to disable, so that the root port for the wireless is also disabled. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I607d700319d6a58618ec95b3440e695c82dff196 Reviewed-on: https://review.coreboot.org/c/coreboot/+/71896 Reviewed-by: Matt DeVillier <matt.devillier@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* mb/starlabs/starbook/adl: Make Type-C USB a standard portSean Rhodes2023-01-271-1/+1
| | | | | | | | | | | | | | | | Change the Type-C USB 2.0 interface to a standard port, as the Type-C macro will not work in Linux (dmesg says the cable is faulty), This makes the port work reliably in Linux, tested with: * Manjaro 21 * Ubuntu 22.04 Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I6dbf31b6e4603685297e9e5203b0db6ac1b9e24a Reviewed-on: https://review.coreboot.org/c/coreboot/+/72387 Reviewed-by: Matt DeVillier <matt.devillier@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* mb/starlabs/starbook/Kconfig: Move MAINBOARD_HAS_TPM2 to STARBOOK_SERIESElyes Haouas2023-01-261-4/+1
| | | | | | | | Change-Id: I5f91ae1b5904405edd797b57fbeb46609301295c Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/72434 Reviewed-by: Sean Rhodes <sean@starlabs.systems> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* mb/starlabs/starbook/adl: Enable pin widget 0x18Sean Rhodes2023-01-251-2/+2
| | | | | | | | | | | | | Enable pin 0x18 which is used for the 3.5mm combo jack microphone detection. Also, disable 0x17 as it is not used. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I05856627c073acaff49ea1ddc048a49a74b6268f Reviewed-on: https://review.coreboot.org/c/coreboot/+/71718 Reviewed-by: Matt DeVillier <matt.devillier@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* mb/starlabs/starbook/adl: Change HDA verb hex values to lower caseSean Rhodes2023-01-251-7/+7
| | | | | | | | Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I6a5c54ac46840fc1e03eb15b9ae2ddc34172ec08 Reviewed-on: https://review.coreboot.org/c/coreboot/+/72011 Reviewed-by: Matt DeVillier <matt.devillier@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* mb/starlabs/starbook/adl: Fix alignmentSean Rhodes2023-01-171-1/+1
| | | | | | | | | Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I4a3f871f2418438ef8e780a39935dfa2f86d8dbb Reviewed-on: https://review.coreboot.org/c/coreboot/+/71895 Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin L Roth <gaumless@gmail.com>
* Revert "mb/starlabs/starbook/adl: Enable the PchHdaAudioLinkHdaEnable UPD"Martin L Roth2023-01-161-4/+3
| | | | | | | | | | | | | | | | This reverts commit 0e945a3426782e3c054a920ff8be3cd865f697ba. Reason for revert: Breaks build. Need to be merged after https://review.coreboot.org/c/coreboot/+/71715 which adds the register that this patch enables Signed-off-by: Martin L Roth <gaumless@gmail.com> Change-Id: I0ac3fb1a44e23e19c9711287f3a6a8402a6ffd79 Reviewed-on: https://review.coreboot.org/c/coreboot/+/71283 Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-by: Felix Singer <felixsinger@posteo.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
* mb/starlabs/starbook/adl: Enable the PchHdaAudioLinkHdaEnable UPDSean Rhodes2023-01-161-3/+4
| | | | | | | | | | Enable the PchHdaAudioLinkHdaEnable UPD so that the sound works. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: Id53c9a6495d584c374e89b76d1fd4258654b6f95 Reviewed-on: https://review.coreboot.org/c/coreboot/+/71716 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com>
* mb/starlabs: Remove the bios_version functionSean Rhodes2023-01-073-14/+0
| | | | | | | | | | | Remove smbios_mainboard_bios_version so that the default CONFIG_LOCALVERSION can be used. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: Ia94f8683a54a98f4e3b1f51521db7e3ccb56ba48 Reviewed-on: https://review.coreboot.org/c/coreboot/+/70855 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
* mainboard/acpi: Replace constant "One" with actual numberFelix Singer2022-12-271-1/+1
| | | | | | | | | Change-Id: Id1078b14a805eea53d2a7c5a8183a5413f26e115 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/71521 Reviewed-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* mb/starlabs/*: Bind console serial output to EDK2_DEBUGSean Rhodes2022-12-222-0/+8
| | | | | | | | | | | Configure the UART port but only enable UART debug for EDK2 debug builds. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I54e1dc5768fd765254c7ede91eaa45842fed3bd6 Reviewed-on: https://review.coreboot.org/c/coreboot/+/69322 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* mb/starlabs/starbook/adl: Set thermal trip based on power profileSean Rhodes2022-12-201-3/+6
| | | | | | | | Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I07be0aa2144b7718e28f1f675978b4b4b92752ae Reviewed-on: https://review.coreboot.org/c/coreboot/+/69492 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* mb/starlabs/starbook: Add Alder Lake StarBook Mk VI variantBen-StarLabs2022-12-1711-5/+860
| | | | | | | | | | | | | | | | | | | | Tested using `edk2` from `github.com/starlabsltd/edk2/tree/uefipayload_202209`: * Windows 10 * Ubuntu 20.04 * MX Linux 19.4 * Manjaro 21 No known issues. https://starlabs.systems/pages/starbook-specification Signed-off-by: Ben-StarLabs <ben@starlabs.systems> Change-Id: Idc0c265a88b19cf9e89cc8ab3e8db9abd8cf8409 Reviewed-on: https://review.coreboot.org/c/coreboot/+/65785 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <inforichland@gmail.com>
generated by cgit v1.2.3 (git 2.25.1) at 2024-07-13 04:20:51 +0000