summaryrefslogtreecommitdiffstats
path: root/src/mainboard/supermicro/x10slm-f
Commit message (Expand)AuthorAgeFilesLines
* {src/mb,util/autoport}: Use macro for DSDT revisionElyes HAOUAS2020-10-131-1/+8
* mb/*/Kconfig: Drop redundant 'select CPU_INTEL_HASWELL'Elyes HAOUAS2020-09-041-1/+0
* lynxpoint: Factor out PIRQ routing from devicetreeAngel Pons2020-07-281-9/+0
* mb/*/*/devicetree.cb: Normalize disabled PIRQ valuesAngel Pons2020-07-261-5/+5
* haswell: Move some MRC settings to devicetreeAngel Pons2020-07-121-2/+0
* haswell: Add function to retrieve SPD addressesAngel Pons2020-07-121-4/+9
* haswell: Automatically determine system typeAngel Pons2020-07-121-1/+0
* haswell: Introduce ENABLE_DDR_2X_REFRESH Kconfig optionAngel Pons2020-07-122-1/+3
* haswell boards: Drop unused romstage.c includesAngel Pons2020-07-121-4/+0
* haswell: Factor out `max_ddr3_freq`Angel Pons2020-07-121-1/+0
* haswell: Compute disabled channel masks at runtimeAngel Pons2020-07-121-8/+0
* mb/supermicro/x10slm-f: Factor out common MRC settingsAngel Pons2020-07-121-45/+45
* haswell: Relocate `mainboard_romstage_entry` to northbridgeAngel Pons2020-07-121-4/+4
* haswell: Drop `struct romstage_params` typeAngel Pons2020-07-121-5/+1
* haswell: Drop GPIO indirection layersAngel Pons2020-07-091-1/+0
* haswell: Turn RCBA configuration into a functionAngel Pons2020-07-091-13/+11
* sb/intel/lynxpoint: Factor out RCBA Function DisableAngel Pons2020-07-081-2/+0
* ACPI: Drop typedef global_nvs_tKyösti Mälkki2020-06-301-1/+2
* haswell boards: Factor out MAX_CPUSAngel Pons2020-06-151-4/+0
* src: Remove redundant includesElyes HAOUAS2020-06-021-1/+0
* src: Remove leading blank lines from SPDX headerElyes HAOUAS2020-05-181-3/+0
* treewide: Remove "this file is part of" linesPatrick Georgi2020-05-1113-13/+0
* src/mainboard: Replace GPLv2 long form headers with SPDX headerElyes HAOUAS2020-05-103-39/+3
* src/: Replace GPL boilerplate with SPDX headersPatrick Georgi2020-05-091-9/+1
* treewide: replace GPLv2 long form headers with SPDX headerPatrick Georgi2020-05-068-96/+8
* treewide: Move "is part of the coreboot project" line in its own commentPatrick Georgi2020-05-068-16/+8
* acpi: Move ACPI table support out of arch/x86 (3/5)Furquan Shaikh2020-05-021-1/+1
* nb/intel/haswell: Deprecate WDB params in pei_dataAngel Pons2020-04-221-2/+0
* mainboard/supermicro: Use SPDX for GPL-2.0-only filesAngel Pons2020-04-041-13/+2
* mainboard/[^a-p]*: Remove copyright noticesPatrick Georgi2020-03-1813-16/+0
* mb/*/{BiosCallOuts,mainboard,romstage}.c: Remove unused <device/pci_{def,ops}.h>Elyes HAOUAS2019-12-191-1/+0
* sb/intel/lynxpoint: Use sb/intel/common/platform.aslArthur Heymans2019-11-041-1/+1
* soc/intel/{IA-CPU/SOC}: Move sleepstates.asl into southbridge/intel/common/acpiSubrata Banik2019-11-011-1/+1
* soc/intel: Use common romstage codeKyösti Mälkki2019-08-261-1/+1
* cpu/intel: Enter romstage without BISTKyösti Mälkki2019-08-181-2/+1
* intel/haswell: Replace monotonic timerKyösti Mälkki2019-07-131-1/+0
* mb/supermicro/x10slm-f: Do SIO setup in bootblockTristan Corrick2019-04-253-24/+42
* src/mb/Kconfig: Fix PCI subsystem IDsElyes HAOUAS2019-04-191-8/+0
* Remove DEFAULT_PCIEXBAR aliasKyösti Mälkki2019-03-061-1/+1
* device/pnp: Add header files for PNP opsKyösti Mälkki2019-03-041-0/+1
* mb/{kontron,supermicro}: Use pcidev_on_root()Elyes HAOUAS2019-01-251-1/+1
* mainboard: Add Supermicro X10SLM+-FTristan Corrick2018-12-2916-0/+842