| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | northbridge/amd/amdmct: Fix broken AMD K10 DDR3 memory initalization | Timothy Pearson | 2015-10-26 | 1 | -1/+4 |
| * | Remove address from GPLv2 headers | Patrick Georgi | 2015-05-21 | 1 | -1/+1 |
| * | GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« | Paul Menzel | 2013-03-01 | 1 | -1/+1 |
| * | For Cx, each ChipSel need to be sent MR command. | Zheng Bao | 2011-01-20 | 1 | -1/+1 |
| * | Fix some settings fo AMD MCT. It is based on BIOS test suite. | Zheng Bao | 2011-01-06 | 1 | -1/+1 |
| * | DDR3 support for AMD Fam10. | Zheng Bao | 2010-04-23 | 1 | -0/+326 |
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| Coreboot firmware sources | coreboot |
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