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* nb/intel/e7505: Hook up PCI domain and CPU ops to devicetreeKyösti Mälkki2022-11-301-13/+2
* aopen/dxplplusu: Support SMM_ASEG and SMM_TSEGKyösti Mälkki2022-11-285-18/+98
* cbmem_top_chipset: Change the return value to uintptr_tElyes Haouas2022-11-181-3/+5
* sb/intel/i82801dx: Improve LPC device early initKyösti Mälkki2022-11-171-3/+2
* Revert "mb/aopen/dxplplusu: Remove board"Kyösti Mälkki2022-11-098-0/+1998
* mb/aopen/dxplplusu: Remove boardArthur Heymans2022-11-078-2006/+0
* nb,soc/intel: Handle upper RAM boundaryKyösti Mälkki2022-07-051-14/+12
* device/resource: Add _kb postfix for resource allocatorsKyösti Mälkki2022-06-221-4/+4
* northbridge/intel: Remove unused <acpi/acpi.h>Elyes HAOUAS2022-04-241-1/+0
* timestamps: Rename timestamps to make names more consistentJakub Czapiga2022-03-081-2/+2
* Rename ECAM-specific MMCONF KconfigsShelley Chen2021-11-101-1/+1
* ACPI: Have common acpi_fill_mcfg()Kyösti Mälkki2021-10-181-6/+0
* cpu/x86: Default to PARALLEL_MP selectedKyösti Mälkki2021-06-071-0/+1
* nb/intel/e7505: Fix for RESOURCE_ALLOCATOR_V4Kyösti Mälkki2021-05-071-2/+2
* src: use ARRAY_SIZE where possiblePatrick Georgi2021-02-151-1/+1
* treewide [Kconfig]: Remove useless commentElyes HAOUAS2021-02-021-1/+1
* cbfs: Enable CBFS mcache on most chipsetsJulius Werner2020-12-021-0/+1
* src/northbridge: Drop unneeded empty linesElyes HAOUAS2020-09-211-1/+0
* src: Remove unused 'include <cpu/x86/msr.h>'Elyes HAOUAS2020-07-141-1/+0
* device/smbus_host: Declare common early SMBus prototypesKyösti Mälkki2020-06-221-1/+1
* src: Use pci_dev_ops_pci where applicableAngel Pons2020-06-061-5/+1
* src: Remove unused 'include <cpu/x86/mtrr.h>'Elyes HAOUAS2020-06-061-1/+0
* nb/intel: Const'ify pci_devfn_t devicesElyes HAOUAS2020-05-181-2/+2
* src: Remove unused '#include <stdint.h>'Elyes HAOUAS2020-05-131-1/+0
* treewide: Remove "this file is part of" linesPatrick Georgi2020-05-117-7/+0
* northbridge/*/Kconfig: Replace GPLv2 long form headers with SPDX headerElyes HAOUAS2020-05-081-13/+2
* treewide: replace GPLv2 long form headers with SPDX headerPatrick Georgi2020-05-061-12/+1
* treewide: Move "is part of the coreboot project" line in its own commentPatrick Georgi2020-05-061-2/+1
* acpi: Move ACPI table support out of arch/x86 (3/5)Furquan Shaikh2020-05-021-1/+1
* src: Remove unused 'include <cpu/x86/cache.h>'Elyes HAOUAS2020-05-011-1/+0
* Replace DEVICE_NOOP with noop_(set|read)_resourcesNico Huber2020-04-101-2/+2
* Drop unnecessary DEVICE_NOOP entriesNico Huber2020-04-101-1/+0
* src/northbridge: Use SPDX for GPL-2.0-only filesAngel Pons2020-04-055-63/+10
* Drop explicit NULL initializations from `device_operations`Elyes HAOUAS2020-04-051-3/+0
* src (minus soc and mainboard): Remove copyright noticesPatrick Georgi2020-03-173-3/+0
* intel/e7505: Always enable DIMM compatibility checksKyösti Mälkki2020-01-121-16/+2
* intel/e7505: Remove commented out suspicious codeKyösti Mälkki2020-01-121-26/+0
* intel/e7505,i82801dx: Refactor raminitKyösti Mälkki2020-01-123-43/+34
* aopen/dxplplusu,intel/e7505: Move mainboard_romstage_entry()Kyösti Mälkki2020-01-122-0/+50
* intel/e7505,i82801dx: Remove wrapper spd_read_byte()Kyösti Mälkki2020-01-122-50/+28
* src/northbridge: Remove unused <stdlib.h>Elyes HAOUAS2019-12-192-2/+0
* arch/x86: Use the stage argument to implement cbmem_topArthur Heymans2019-11-031-1/+0
* lib/cbmem_top: Add a common cbmem_top implementationArthur Heymans2019-11-011-1/+1
* src/[northbridge,security]: change "unsigned" to "unsigned int"Martin Roth2019-10-271-2/+2
* src/{device,drivers,mb,nb,soc,sb}: Remove unused 'include <console/console.h>'Elyes HAOUAS2019-10-211-1/+0
* soc/intel: Use common romstage codeKyösti Mälkki2019-08-261-1/+0
* arch/x86: Add <arch/romstage.h>Kyösti Mälkki2019-08-221-1/+1
* arch/x86: Add postcar_frame_common_mtrrs()Kyösti Mälkki2019-08-151-0/+2
* cpu/intel: Refactor platform_enter_postcar()Kyösti Mälkki2019-08-151-14/+3
* arch/x86: Flip option NO_CAR_GLOBAL_MIGRATIONKyösti Mälkki2019-08-111-1/+0