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path: root/src/northbridge/intel/fsp_rangeley/fsp/chipset_fsp_util.c
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* nb/sb/cpu: Drop Intel Rangeley supportArthur Heymans2019-11-211-160/+0
* sb,nb/intel/fsp_rangeley: Rename from xx_DEV_FUNCKyösti Mälkki2019-10-051-9/+9
* intel/fsp1_0,baytrail,rangeley: Tidy up use of preprocessorKyösti Mälkki2019-08-211-11/+3
* drivers/intel/fsp1_0: Deduplicate codePatrick Rudolph2019-03-161-13/+0
* coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)Julius Werner2019-03-081-1/+1
* device: Use pcidev_path_on_root()Kyösti Mälkki2019-01-061-1/+1
* intel: Use CF9 reset (part 1)Patrick Rudolph2018-10-221-2/+2
* src/northbridge: Use "foo *bar" instead of "foo* bar"Elyes HAOUAS2018-07-091-1/+1
* lib: provide clearer devicetree semanticsAaron Durbin2017-04-251-2/+2
* northbridge/intel/fsp_rangeley: Add space around operatorsElyes HAOUAS2016-09-201-1/+1
* northbridge/intel: Add required space before opening parenthesis '('Elyes HAOUAS2016-08-311-10/+10
* tree: drop last paragraph of GPL copyright headerPatrick Georgi2015-10-311-4/+0
* Revert "Remove FSP Rangeley SOC and mohonpeak board support"Martin Roth2015-10-141-0/+185
* Remove FSP Rangeley SOC and mohonpeak board supportAlexandru Gagniuc2015-10-031-185/+0
* Remove address from GPLv2 headersPatrick Georgi2015-05-211-1/+1
* fsp: Move fsp to fsp1_0Marc Jones2015-04-241-1/+1
* FSP & CBMEM: Fix broken cbmem CAR transition.Martin Roth2015-02-061-0/+2
* intel/rangeley: Update UPD_DATA_REGION to support POST-GOLD 2 FSPYork Yang2015-01-311-0/+7
* x86 romstage: Move stack just below RAMTOPKyösti Mälkki2014-10-191-1/+0
* northbridge/intel: Add fsp_rangeley northbridge supportMartin Roth2014-07-301-0/+177