coreboot.git - Coreboot firmware sources

	Commit message (Expand)	Author	Age	Files	Lines
*	cpu/intel/speedstep: Have nb and sb code provide c5/c6/slfm	Arthur Heymans	2022-12-05	1	-0/+1
*	treewide: Remove "this file is part of" lines	Patrick Georgi	2020-05-11	1	-1/+0
*	src/northbridge: Use SPDX for GPL-2.0-only files	Angel Pons	2020-04-05	1	-13/+2
*	src (minus soc and mainboard): Remove copyright notices	Patrick Georgi	2020-03-17	1	-2/+0
*	nb/intel/gm45: Set display backlight according to EDID string	Arthur Heymans	2017-05-03	1	-1/+1
*	nb/gm45/gma.c: Compute BLC_PWM_CTL value from PWM frequency	Arthur Heymans	2016-11-28	1	-0/+2
*	nb/intel/raminit (native): Read PCI mmio size from devicetree	Patrick Rudolph	2016-06-12	1	-0/+5
*	nb/intel/gm45: Backport configuration of panel power timings	Nico Huber	2016-01-14	1	-0/+5
*	tree: drop last paragraph of GPL copyright header	Patrick Georgi	2015-10-31	1	-4/+0
*	Remove address from GPLv2 headers	Patrick Georgi	2015-05-21	1	-1/+1
*	intel/gma: consolidate vbt code	Vladimir Serbinenko	2014-09-13	1	-4/+3
*	intel/gm45: native gfx init.	Vladimir Serbinenko	2014-08-16	1	-0/+4
*	GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«	Paul Menzel	2013-03-01	1	-1/+1
*	intel/gm45: new northbridge	Patrick Georgi	2012-11-27	1	-0/+27