coreboot.git - Coreboot firmware sources

	Commit message (Expand)	Author	Age	Files	Lines
*	nb/intel/gm45: Use new fixed BAR accessors	Angel Pons	2021-04-10	1	-17/+14
*	nb/intel/gm45: Use PCI bitwise ops	Angel Pons	2020-08-04	1	-6/+6
*	treewide: Remove "this file is part of" lines	Patrick Georgi	2020-05-11	1	-1/+0
*	src/northbridge: Use SPDX for GPL-2.0-only files	Angel Pons	2020-04-05	1	-14/+2
*	src (minus soc and mainboard): Remove copyright notices	Patrick Georgi	2020-03-17	1	-1/+0
*	src/northbridge: Remove unneeded include <arch/io.h>	Elyes HAOUAS	2019-05-15	1	-1/+0
*	{gm45,pineview,sandybridge,x4x}: Use {full,system}_reset() function	Elyes HAOUAS	2019-05-07	1	-5/+3
*	device/pci: Fix PCI accessor headers	Kyösti Mälkki	2019-03-01	1	-0/+1
*	src/northbridge: Capitalize CPU, RAM and ROM	Elyes HAOUAS	2016-07-31	1	-1/+1
*	tree: drop last paragraph of GPL copyright header	Patrick Georgi	2015-10-31	1	-4/+0
*	Remove address from GPLv2 headers	Patrick Georgi	2015-05-21	1	-2/+1
*	Replace hlt with halt()	Patrick Georgi	2014-12-02	1	-1/+2
*	x86: Unify arch/io.h and arch/romcc_io.h	Stefan Reinauer	2013-03-22	1	-1/+0
*	intel/gm45: new northbridge	Patrick Georgi	2012-11-27	1	-0/+74