coreboot.git - Coreboot firmware sources

	Commit message (Expand)	Author	Age	Files	Lines
*	cbmem_top_chipset: Change the return value to uintptr_t	Elyes Haouas	2022-11-18	1	-2/+2
*	nb/intel/haswell: Calculate TSEG limit from registers	Angel Pons	2021-02-01	1	-4/+6
*	intel/txt: Add `txt_get_chipset_dpr` function	Angel Pons	2020-10-17	1	-3/+7
*	nb/intel/haswell: Account for DPR region in memory map	Angel Pons	2020-10-15	1	-8/+37
*	{nb,soc}/intel/{haswell,broadwell}/memmap.c: Use ALIGN_DOWN(x, a)	Elyes HAOUAS	2020-09-02	1	-1/+1
*	treewide: Remove "this file is part of" lines	Patrick Georgi	2020-05-11	1	-1/+0
*	src/northbridge: Use SPDX for GPL-2.0-only files	Angel Pons	2020-04-05	1	-13/+2
*	src (minus soc and mainboard): Remove copyright notices	Patrick Georgi	2020-03-17	1	-1/+0
*	nb/intel/haswell: Tidy up code and comments	Angel Pons	2020-03-15	1	-5/+4
*	lib/cbmem_top: Add a common cbmem_top implementation	Arthur Heymans	2019-11-01	1	-1/+1
*	src/{device,drivers,mb,nb,soc,sb}: Remove unused 'include <console/console.h>'	Elyes HAOUAS	2019-10-21	1	-1/+0
*	intel/haswell: Use smm_subregion()	Kyösti Mälkki	2019-08-28	1	-11/+4
*	soc/intel: Use common romstage code	Kyösti Mälkki	2019-08-26	1	-1/+1
*	arch/x86: Add <arch/romstage.h>	Kyösti Mälkki	2019-08-22	1	-1/+1
*	arch/x86: Add postcar_frame_common_mtrrs()	Kyösti Mälkki	2019-08-15	1	-6/+0
*	cpu/intel: Refactor platform_enter_postcar()	Kyösti Mälkki	2019-08-15	1	-12/+4
*	intel/haswell: Move platform_enter_postcar()	Kyösti Mälkki	2019-08-11	1	-0/+31
*	northbridge/intel: Rename ram_calc.c to memmap.c	Kyösti Mälkki	2019-08-07	1	-0/+50