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path: root/src/northbridge/intel/i3100
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* nb/intel/*/northbridge.c: Remove #include <device/hypertransport.h>Arthur Heymans2017-01-061-1/+0
* MMCONF_SUPPORT: Drop redundant loggingKyösti Mälkki2016-12-071-13/+2
* MMCONF_SUPPORT: Consolidate resource registrationKyösti Mälkki2016-12-071-9/+1
* MMCONF_SUPPORT: Flip default to enabledKyösti Mälkki2016-12-071-0/+1
* nb/intel: Fix some spelling mistakes in comments and stringsMartin Roth2016-11-212-11/+11
* northbridge/intel/i3100: Add space around operatorsElyes HAOUAS2016-09-204-157/+157
* src/northbridge: Improve code formattingElyes HAOUAS2016-09-122-8/+8
* northbridge/intel: Add required space before opening parenthesis '('Elyes HAOUAS2016-08-315-148/+148
* src/northbridge: Capitalize CPU, RAM and ROMElyes HAOUAS2016-07-312-2/+2
* Ignore RAMTOP for MTRRsKyösti Mälkki2016-06-221-2/+2
* cpu/x86/mtrr: move cache_ramstage() to its only userAaron Durbin2016-03-161-3/+9
* northbridge/intel/i3100: Unify UDELAY selectionStefan Reinauer2016-03-132-0/+2
* northbridge/intel: add missing #include guardsIru Cai2016-02-281-0/+5
* tree: drop last paragraph of GPL copyright headerPatrick Georgi2015-10-3111-44/+0
* lib: Unify log2() and related functionsJulius Werner2015-06-051-0/+1
* devicetree: Change scan_bus() prototype in device opsKyösti Mälkki2015-06-042-4/+6
* Remove address from GPLv2 headersPatrick Georgi2015-05-2111-11/+11
* kbuild: automatically include northbridgesStefan Reinauer2015-04-291-0/+4
* devicetree: Drop redundant scan_bus() opsKyösti Mälkki2015-03-011-7/+1
* x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointerKevin Paul Herbert2015-02-153-7/+8
* CBMEM: Tag chipsets with LATE_CBMEM_INITKyösti Mälkki2015-01-271-0/+1
* northbridge: Drop print_ implementation from non-romcc boardsStefan Reinauer2015-01-062-147/+60
* intel/truxton: Un-romcc-ify boardStefan Reinauer2014-12-182-10/+4
* northbridge/intel: Use DEVICE_NOOP macro over dummy symbolEdward O'Callaghan2014-11-011-7/+3
* i3100: Convert to per-device ACPIVladimir Serbinenko2014-10-181-0/+25
* Uniformly spell frequency unit symbol as HzElyes HAOUAS2014-07-291-5/+5
* src: Make use of 'CEIL_DIV(a, b)' macro across treeEdward O'Callaghan2014-07-111-5/+5
* northbridge: Trivial - drop trailing blank lines at EOFEdward O'Callaghan2014-07-081-1/+0
* northbridge/intel/i3100/raminit.c: Uninitialized variableEdward O'Callaghan2014-05-252-3/+3
* lib: Make log2() available in romstage on ARM, not just x86Alexandru Gagniuc2014-01-131-0/+1
* CBMEM northbridges: Remove references to global high_tables_baseKyösti Mälkki2013-09-111-3/+1
* Set PCI bus operations at buildtime for ramstageKyösti Mälkki2013-07-111-1/+1
* Move select MMCONF_SUPPORT under northbridge (fix)Kyösti Mälkki2013-07-041-1/+0
* Move select MMCONF_SUPPORT under northbridgeKyösti Mälkki2013-07-031-0/+1
* Get rid of a number of __GNUC__ checksStefan Reinauer2013-05-101-2/+0
* Drop prototype guarding for romccStefan Reinauer2013-05-101-2/+0
* GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«Paul Menzel2013-03-0111-11/+11
* Drop CONFIG_WRITE_HIGH_TABLESStefan Reinauer2013-02-281-5/+1
* sconfig: rename lapic_cluster -> cpu_clusterStefan Reinauer2013-02-141-1/+1
* sconfig: rename pci_domain -> domainStefan Reinauer2013-02-141-1/+1
* Intel: Replace MSR 0xcd with MSR_FSB_FREQPatrick Georgi2013-02-112-3/+5
* Remove assembly coded log2 functionRonald G. Minnich2012-11-281-1/+0
* Get rid of drivers classPatrick Georgi2012-11-271-3/+3
* Auto-declare chip_operationsKyösti Mälkki2012-08-221-1/+0
* Rename cache_lbmem() to cache_ramstage()Stefan Reinauer2012-07-242-2/+2
* Clean up #ifsPatrick Georgi2012-05-082-3/+3
* Move C labels to start-of-linePatrick Georgi2012-03-072-4/+4
* Replace while with do; while to avoid repetitionNoe Rubinstein2011-09-092-69/+46
* We hardcode highmemory size in every northbridge! This is bad, and especiall...Rudolf Marek2010-12-131-4/+3
* Move DIMM_MAP_LOGICAL to Kconfig.Patrick Georgi2010-11-182-5/+7