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path: root/src/northbridge/intel/i945/early_init.c
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* src/northbridge: Add missing 'include <types.h>'Elyes HAOUAS2019-05-291-2/+3
* nb/intel/i945: Use macro instead of magic numberElyes HAOUAS2019-05-101-2/+2
* src: Remove unused include <halt.h>Elyes HAOUAS2019-05-061-1/+0
* ich7/i945: Use system_reset()Elyes HAOUAS2019-04-291-2/+2
* nb/intel/i945: Fix ich7_setup_root_complex_topologyElyes HAOUAS2019-04-111-25/+15
* nb/intel/i945: Use DEBUG_RAM_SETUPKyösti Mälkki2019-03-241-16/+2
* src: Use 'include <string.h>' when appropriateElyes HAOUAS2019-03-201-1/+0
* nb/intel/i945: Remove 2nd write on SLOTCAP (R/WO)Elyes HAOUAS2019-03-181-5/+0
* coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)Julius Werner2019-03-081-7/+7
* src: Drop unused include <arch/acpi.h>Elyes HAOUAS2019-03-061-1/+0
* device/pci: Fix PCI accessor headersKyösti Mälkki2019-03-011-0/+1
* nb/intel/i945: Fix typo on DMIBAR32(0x334)Elyes HAOUAS2019-01-271-1/+1
* nb/intel/i945: Remove initialization already done at bootblockElyes HAOUAS2019-01-271-4/+0
* i945,ICH7: Write on RPFN only onceElyes HAOUAS2019-01-231-2/+0
* nb/intel/i945: Add and use defines for registers of device 0:01.0Elyes HAOUAS2018-11-251-40/+40
* nb/intel/i945/early_init.c: Correct the PEG_LC address of DEV(0:01.0)Elyes HAOUAS2018-11-251-1/+1
* nb/intel/*: Use 2M TSEG instead of 8M on pre-arrandale hardwareArthur Heymans2018-10-241-2/+3
* nb/intel/{gm45,i945,pineview}: Use macro instead of GGC addressElyes HAOUAS2018-10-081-1/+1
* nb/intel/i945: Enable and allocate 8M for TSEGArthur Heymans2018-06-071-0/+5
* nb/intel/i945/early_init.c: Replace numbers with macrosElyes HAOUAS2017-09-201-1/+1
* nb/intel/i945: Clear timeout bits after disabling watchdogNico Huber2017-09-101-0/+2
* nb/intel: add IS_ENABLED() around Kconfig symbol referencesMartin Roth2017-06-271-2/+2
* nb/intel/i945: Fix PEG port on 945gcArthur Heymans2017-04-141-1/+2
* nb/intel/i945: Fix errors found by checkpatch.plArthur Heymans2017-03-221-26/+30
* sb/ich7: Use common/gpio.h to set up GPIOsArthur Heymans2017-01-061-1/+2
* nb/i945/early_init.c: Add FSB800 and 1067 to Egress Port Virtual ChannelElyes HAOUAS2016-12-211-0/+18
* intel/i945: Use romstage_handoff for S3Kyösti Mälkki2016-12-111-10/+2
* intel i945 gm45 x4x post-car: Use postcar_frame for MTRR setupKyösti Mälkki2016-12-111-1/+0
* nb/intel: Fix some spelling mistakes in comments and stringsMartin Roth2016-11-211-1/+1
* nb/intel/i945/early_init.c: Add DDR2-667 detection for 945GCElyes HAOUAS2016-11-091-0/+1
* nb/intel/i945/early_init.c: Use "IS_ENABLED(CONFIG_ ....)"Elyes HAOUAS2016-11-021-6/+6
* src/northbridge: Remove unnecessary whitespaceElyes HAOUAS2016-10-041-7/+7
* northbridge/intel/i945: Add space around operatorsElyes HAOUAS2016-09-201-1/+1
* i945: Enable changing VRAM sizeArthur Heymans2016-08-311-5/+9
* intel/i945: Use common ACPI S3 recoveryKyösti Mälkki2016-06-261-10/+1
* Move definitions of HIGH_MEMORY_SAVEKyösti Mälkki2016-06-171-0/+1
* tree: drop last paragraph of GPL copyright headerPatrick Georgi2015-10-311-4/+0
* Remove address from GPLv2 headersPatrick Georgi2015-05-211-1/+1
* x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointerKevin Paul Herbert2015-02-151-6/+6
* intel/i945: Use define for `BSM`Paul Menzel2014-12-191-1/+1
* i82801gx: Enable upper CMOS in bootblock.Vladimir Serbinenko2014-12-031-0/+3
* i945: Bit 49 of CAPID0 trivial fixElyes HAOUAS2014-12-021-1/+1
* Replace hlt with halt()Patrick Georgi2014-12-021-1/+2
* i945: make PCIe link wait sensiblePatrick Georgi2014-11-281-5/+5
* i945: consolidate sb & nb early initsVladimir Serbinenko2014-11-091-1/+51
* intel/i945: Another magic numberPatrick Georgi2014-10-011-1/+1
* intel/i945: Fix "always false" statementPatrick Georgi2014-10-011-1/+1
* northbridge: Trivial - drop trailing blank lines at EOFEdward O'Callaghan2014-07-081-1/+0
* i945: Use defines for DEVENKyösti Mälkki2014-05-311-6/+5
* intel/i945 intel/i82801gx: remove explicit pcie config accessesKyösti Mälkki2013-09-101-70/+70
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