coreboot.git - Coreboot firmware sources

	Commit message (Expand)	Author	Age	Files	Lines
*	cbmem_top_chipset: Change the return value to uintptr_t	Elyes Haouas	2022-11-18	1	-3/+2
*	nb/intel/i945/memmap.c: Clean up includes	Elyes Haouas	2022-10-06	1	-4/+3
*	nb/intel/i945/memmap.c: Fix TOLUD bit field mask	Petr Cvek	2022-04-22	1	-1/+1
*	nb/intel: Add missing <types.h>	Elyes HAOUAS	2021-02-16	1	-1/+1
*	nb/intel/i945: Put names to northbridge PCI devices	Angel Pons	2020-07-22	1	-5/+5
*	treewide: Remove "this file is part of" lines	Patrick Georgi	2020-05-11	1	-1/+0
*	nb/intel/i945/memmap: Convert to 96 characters line length	Elyes HAOUAS	2020-05-04	1	-6/+3
*	src/northbridge: Use SPDX for GPL-2.0-only files	Angel Pons	2020-04-05	1	-13/+2
*	src (minus soc and mainboard): Remove copyright notices	Patrick Georgi	2020-03-17	1	-1/+0
*	src: capitalize 'RAM'	Elyes HAOUAS	2020-02-24	1	-2/+2
*	nb/i945: Fix typo	Elyes HAOUAS	2019-12-06	1	-1/+1
*	lib/cbmem_top: Add a common cbmem_top implementation	Arthur Heymans	2019-11-01	1	-1/+1
*	intel/smm/gen1: Use smm_subregion()	Kyösti Mälkki	2019-08-28	1	-10/+6
*	soc/intel: Use common romstage code	Kyösti Mälkki	2019-08-26	1	-1/+0
*	arch/x86: Add <arch/romstage.h>	Kyösti Mälkki	2019-08-22	1	-1/+1
*	intel/smm/gen1: Rename header file	Kyösti Mälkki	2019-08-15	1	-1/+1
*	arch/x86: Add postcar_frame_common_mtrrs()	Kyösti Mälkki	2019-08-15	1	-7/+0
*	cpu/intel: Refactor platform_enter_postcar()	Kyösti Mälkki	2019-08-15	1	-14/+5
*	northbridge/intel: Rename ram_calc.c to memmap.c	Kyösti Mälkki	2019-08-07	1	-0/+132