coreboot.git - Coreboot firmware sources

	Commit message (Expand)	Author	Age	Files	Lines
*	intel/cpu: Switch older models to TSC_MONOTONIC_TIMER	Kyösti Mälkki	2019-09-24	1	-77/+0
*	intel: Replace msr(0x198) with msr(IA32_PERF_STATUS)	Elyes HAOUAS	2017-11-30	1	-1/+1
*	nb/intel/i945: Fix errors found by checkpatch.pl	Arthur Heymans	2017-03-22	1	-2/+1
*	tree: drop last paragraph of GPL copyright header	Patrick Georgi	2015-10-31	1	-4/+0
*	Remove address from GPLv2 headers	Patrick Georgi	2015-05-21	1	-1/+1
*	Intel GM45, 945, Sandy Bridge: Unify `delay.c` and `udelay.c`	Paul Menzel	2013-07-02	1	-3/+2
*	Intel GM45, 945, SNB: Move `multiply_to_tsc()` to `tsc.h`	Ronald G. Minnich	2013-05-25	1	-12/+0
*	GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«	Paul Menzel	2013-03-01	1	-1/+1
*	Intel: Replace MSR 0xcd with MSR_FSB_FREQ	Patrick Georgi	2013-02-11	1	-1/+2
*	Fix udelay() implementation for i945 romstage	Nico Huber	2012-07-20	1	-4/+14
*	i945: fix tsc udelay()	Sven Schnelle	2012-01-10	1	-2/+2
*	Remove lib/ramtest.c-include from all CAR boards.	Patrick Georgi	2010-10-05	1	-0/+1
*	i945:	Stefan Reinauer	2010-05-14	1	-1/+2
*	Add some trivial numbers for 945, and Core2 Duo E8200 Intel parts	Peter Stuge	2009-10-01	1	-0/+12
*	put in a little comment (trivial)	Stefan Reinauer	2009-01-20	1	-2/+2
*	Support for the Intel 945 northbridge.	Stefan Reinauer	2008-10-29	1	-0/+70