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* nb/intel: Remove unused 'barrier()'Elyes HAOUAS2019-11-011-2/+0
* acpi: Drop wrong _ADR objects for PCI host bridgesElyes HAOUAS2019-10-241-1/+0
* kontron/986lcd-m,roda/rk886ex: Drop secondary PCI resetKyösti Mälkki2019-10-051-9/+0
* intel/i945,i82801gx: Refactor early PCI bridge resetKyösti Mälkki2019-10-052-25/+20
* intel/i945: Define peg_plugin for potential add-on PCIe cardKyösti Mälkki2019-10-011-7/+10
* intel/i945: Delay bridge VGA IO enable to ramstageKyösti Mälkki2019-10-011-5/+0
* intel/i945: Define p2peg for PCIe x16 slotKyösti Mälkki2019-10-011-80/+82
* intel/pci: Utilise pci_def.h for PCI_BRIDGE_CONTROLKyösti Mälkki2019-10-012-22/+20
* intel/cpu: Switch older models to TSC_MONOTONIC_TIMERKyösti Mälkki2019-09-243-80/+0
* {i945,i82801gx}: Remove unneeded include <cpu/x86/cache.h>Elyes HAOUAS2019-09-151-1/+0
* nb/i945: Remove unused include <cpu/cpu.h>Elyes HAOUAS2019-09-151-1/+0
* intel/smm/gen1: Use smm_subregion()Kyösti Mälkki2019-08-281-10/+6
* soc/intel: Use common romstage codeKyösti Mälkki2019-08-261-1/+0
* arch/x86: Add <arch/romstage.h>Kyösti Mälkki2019-08-221-1/+1
* intel/smm/gen1: Rename header fileKyösti Mälkki2019-08-152-2/+2
* arch/x86: Add postcar_frame_common_mtrrs()Kyösti Mälkki2019-08-151-7/+0
* cpu/intel: Refactor platform_enter_postcar()Kyösti Mälkki2019-08-151-14/+5
* cpu/intel: Replace bsp_init_and_start_aps()Kyösti Mälkki2019-08-151-6/+1
* arch/x86: Flip option NO_CAR_GLOBAL_MIGRATIONKyösti Mälkki2019-08-111-1/+0
* arch/x86: Enable POSTCAR_CONSOLE by defaultKyösti Mälkki2019-08-111-1/+0
* lib/stage_cache: Refactor Kconfig optionsKyösti Mälkki2019-08-081-1/+0
* northbridge/intel: Rename ram_calc.c to memmap.cKyösti Mälkki2019-08-072-3/+3
* intel/i945,gm45,pineview,x4x: Fix stage cache locationKyösti Mälkki2019-08-031-4/+3
* intel/i945,gm45,pineview,x4x: Move stage cache support functionKyösti Mälkki2019-08-033-33/+13
* nb/i945/gma: Store vga_disable if MAINBOARD_DO_NATIVE_VGA_INITElyes HAOUAS2019-07-181-2/+1
* nb/i945: Fix gate graphics hardware for frequency changeElyes HAOUAS2019-07-171-1/+0
* intel/i945: Fix udelay() prototypesKyösti Mälkki2019-07-132-1/+1
* cpu/x86: Flip SMM_TSEG defaultKyösti Mälkki2019-07-091-1/+0
* arch/x86: Adjust size of postcar stackKyösti Mälkki2019-07-041-3/+1
* nb/i945: Drop CHANNEL_XOR_RANDOMIZATION selectionElyes HAOUAS2019-06-142-8/+0
* src/northbridge: Add missing 'include <types.h>'Elyes HAOUAS2019-05-292-2/+4
* i945: Add device identification D2:F1Elyes HAOUAS2019-05-201-0/+1
* src/northbridge: Remove unneeded include <arch/io.h>Elyes HAOUAS2019-05-151-1/+0
* nb/intel/i945: Use macro instead of magic numberElyes HAOUAS2019-05-102-13/+13
* src: Remove unused include <halt.h>Elyes HAOUAS2019-05-062-2/+0
* ich7/i945: Use system_reset()Elyes HAOUAS2019-04-291-2/+2
* nb/intel/i945: Check if interleaved even if rank #4 size is zeroElyes HAOUAS2019-04-231-15/+5
* ich7/i945: Use full_reset()Elyes HAOUAS2019-04-231-6/+3
* nb/intel/i945: Fix ich7_setup_root_complex_topologyElyes HAOUAS2019-04-111-25/+15
* nb/intel/{gm45,i945,x4x}: Correct array bounds checksJacob Garber2019-04-111-1/+1
* Fix up remaining boolean uses of CONFIG_XXX to CONFIG(XXX)Julius Werner2019-03-252-3/+3
* nb/intel/i945: Use DEBUG_RAM_SETUPKyösti Mälkki2019-03-244-22/+3
* {northbridge, soc, southbridge}/intel: Make use of pci_dev_set_subsystem()Subrata Banik2019-03-212-25/+2
* src: Use 'include <string.h>' when appropriateElyes HAOUAS2019-03-203-3/+0
* nb/intel/i945: Remove 2nd write on SLOTCAP (R/WO)Elyes HAOUAS2019-03-181-5/+0
* nb/intel/stage_cache.c: Drop unnecessary includesElyes HAOUAS2019-03-131-3/+1
* coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)Julius Werner2019-03-084-36/+36
* src: Drop unused include <arch/acpi.h>Elyes HAOUAS2019-03-061-1/+0
* Remove DEFAULT_PCIEXBAR aliasKyösti Mälkki2019-03-062-2/+1
* device/mmio.h: Add include file for MMIO opsKyösti Mälkki2019-03-043-1/+5