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coreboot.git
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4.10_branch
4.11_branch
4.12_branch
4.14_branch
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4.18_branch
4.19_branch
4.2
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4.22_branch
4.3
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path:
root
/
src
/
northbridge
/
intel
/
pineview
/
memmap.c
Commit message (
Expand
)
Author
Age
Files
Lines
*
cbmem_top_chipset: Change the return value to uintptr_t
Elyes Haouas
2022-11-18
1
-2
/
+2
*
nb/intel: Add missing <types.h>
Elyes HAOUAS
2021-02-16
1
-1
/
+1
*
nb/intel/pineview: Define and use MMCONF_BUS_NUMBER
Angel Pons
2021-01-30
1
-37
/
+0
*
src/northbridge: Drop unneeded empty lines
Elyes HAOUAS
2020-09-21
1
-1
/
+0
*
nb/intel/pineview: Refactor `decode_pcie_bar`
Angel Pons
2020-08-04
1
-9
/
+5
*
nb/intel/pineview: Change signature of `decode_pciebar`
Angel Pons
2020-08-04
1
-1
/
+1
*
nb/intel/pineview: Use `MiB` definition
Angel Pons
2020-08-04
1
-4
/
+5
*
treewide: Remove "this file is part of" lines
Patrick Georgi
2020-05-11
1
-1
/
+0
*
src/northbridge: Use SPDX for GPL-2.0-only files
Angel Pons
2020-04-05
1
-13
/
+2
*
src (minus soc and mainboard): Remove copyright notices
Patrick Georgi
2020-03-17
1
-2
/
+0
*
nb/intel/pineview: Clean up code and comments
Angel Pons
2020-03-15
1
-22
/
+17
*
src: capitalize 'RAM'
Elyes HAOUAS
2020-02-24
1
-2
/
+2
*
lib/cbmem_top: Add a common cbmem_top implementation
Arthur Heymans
2019-11-01
1
-1
/
+1
*
intel/smm/gen1: Use smm_subregion()
Kyösti Mälkki
2019-08-28
1
-10
/
+6
*
soc/intel: Use common romstage code
Kyösti Mälkki
2019-08-26
1
-1
/
+0
*
arch/x86: Add <arch/romstage.h>
Kyösti Mälkki
2019-08-22
1
-1
/
+1
*
intel/smm/gen1: Rename header file
Kyösti Mälkki
2019-08-15
1
-1
/
+1
*
arch/x86: Add postcar_frame_common_mtrrs()
Kyösti Mälkki
2019-08-15
1
-7
/
+0
*
cpu/intel: Refactor platform_enter_postcar()
Kyösti Mälkki
2019-08-15
1
-15
/
+5
*
northbridge/intel: Rename ram_calc.c to memmap.c
Kyösti Mälkki
2019-08-07
1
-0
/
+182