| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | intel/pci: Utilise pci_def.h for PCI_BRIDGE_CONTROL | Kyösti Mälkki | 2019-10-01 | 1 | -1/+0 |
| * | nb/intel/pineview: Move to C_ENVIRONMENT_BOOTBLOCK | Arthur Heymans | 2019-05-25 | 1 | -1/+0 |
| * | nb/intel/pineview: Move the boilerplate mainboard_romstage_entry | Arthur Heymans | 2019-01-14 | 1 | -0/+5 |
| * | nb/intel/{i945,pineview}: Remove unused function | Arthur Heymans | 2019-01-14 | 1 | -3/+0 |
| * | nb/intel/pineview: Enable and allocate 8M for TSEG | Arthur Heymans | 2018-06-07 | 1 | -1/+1 |
| * | nb/intel: Fix some spelling mistakes in comments and strings | Martin Roth | 2016-11-21 | 1 | -1/+1 |
| * | nb/intel/pineview: Native VGA init (CRT) | Damien Zammit | 2016-01-28 | 1 | -1/+0 |
| * | northbridge/intel/pineview: Add remaining boilerplate code for northbridge | Damien Zammit | 2015-12-02 | 1 | -2/+131 |
| * | northbridge/intel/pineview: Add minimal Pineview northbridge | Damien Zammit | 2015-11-24 | 1 | -0/+116 |
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index : coreboot.git | |
| Coreboot firmware sources | coreboot |
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