coreboot.git - Coreboot firmware sources

	Commit message (Expand)	Author	Age	Files	Lines
*	nb/intel/sandybridge: Drop raminit_native.h	Keith Hui	2023-11-14	1	-11/+0
*	nb/intel/sandybridge: Clean up post Haswell SPD mapping API migration	Keith Hui	2023-11-13	1	-4/+0
*	nb/intel/sandybridge: Add missing includes	Elyes HAOUAS	2020-07-26	1	-0/+2
*	treewide: Remove "this file is part of" lines	Patrick Georgi	2020-05-11	1	-1/+0
*	nb/intel/sandybridge: Use SPDX headers	Angel Pons	2020-03-25	1	-13/+2
*	nb/intel/sandybridge: Tidy up code and comments	Angel Pons	2020-03-18	1	-2/+2
*	src (minus soc and mainboard): Remove copyright notices	Patrick Georgi	2020-03-17	1	-1/+0
*	intel sandy/ivy: Improve DIMM replacement detection	Kyösti Mälkki	2016-11-20	1	-2/+2
*	intel sandy/ivy: Move SPD loading after TS_BEFORE_INITRAM	Kyösti Mälkki	2016-11-20	1	-1/+0
*	Merge sandy/ivybridge romstage flow for MRC and non-MRC.	Vladimir Serbinenko	2016-02-12	1	-5/+3
*	ivy: Add a possiblity for mainboard early init.	Vladimir Serbinenko	2016-02-09	1	-0/+1
*	tree: drop last paragraph of GPL copyright header	Patrick Georgi	2015-10-31	1	-4/+0
*	Remove address from GPLv2 headers	Patrick Georgi	2015-05-21	1	-1/+1
*	sandy/ivy native: dedup romstage.c main()	Vladimir Serbinenko	2014-10-24	1	-0/+3
*	sandy/ivybridge: Native raminit.	Vladimir Serbinenko	2014-07-29	1	-0/+29