| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | nb/intel/x4x: Use new fixed BAR accessors | Angel Pons | 2021-04-10 | 1 | -2/+2 |
| * | nb/intel/x4x: Correct and use macros for CLKCFG | Angel Pons | 2021-04-10 | 1 | -1/+1 |
| * | nb/intel/x4x: Add missing newlines to log message | Angel Pons | 2021-04-10 | 1 | -2/+2 |
| * | nb/intel/x4x: Reflow long lines | Angel Pons | 2021-04-10 | 1 | -101/+54 |
| * | device/dram/ddr3: Get rid of useless typedefs | Angel Pons | 2021-04-05 | 1 | -1/+1 |
| * | nb/intel/x4x: Use a variable for s3resume | Kyösti Mälkki | 2021-02-23 | 1 | -2/+5 |
| * | nb/intel/x4x,sandybridge: Move INITRAM timestamps | Kyösti Mälkki | 2021-02-23 | 1 | -1/+2 |
| * | nb/intel/x4x: Clean up raminit comments | Angel Pons | 2021-01-15 | 1 | -2/+1 |
| * | nb/intel/x4x: Place raminit definitions in raminit.h | Angel Pons | 2020-10-14 | 1 | -0/+1 |
| * | nb/intel/x4x/iomap.h: Rename to memmap.h | Angel Pons | 2020-09-25 | 1 | -1/+0 |
| * | src/northbridge: Drop unneeded empty lines | Elyes HAOUAS | 2020-09-21 | 1 | -2/+0 |
| * | mrc_cache: Add mrc_cache fetch functions to support non-x86 platforms | Shelley Chen | 2020-08-24 | 1 | -8/+6 |
| * | nb/intel/x4x: Define and use `HOST_BRIDGE` macro | Angel Pons | 2020-08-04 | 1 | -9/+9 |
| * | device/smbus_host: Declare common early SMBus prototypes | Kyösti Mälkki | 2020-06-22 | 1 | -5/+1 |
| * | nb/intel/x4x: Use PCI bitwise ops | Angel Pons | 2020-06-09 | 1 | -8/+6 |
| * | src: Remove unused 'include <cpu/x86/mtrr.h>' | Elyes HAOUAS | 2020-06-06 | 1 | -1/+0 |
| * | treewide: Remove "this file is part of" lines | Patrick Georgi | 2020-05-11 | 1 | -1/+0 |
| * | treewide: replace GPLv2 long form headers with SPDX header | Patrick Georgi | 2020-05-06 | 1 | -12/+1 |
| * | treewide: Move "is part of the coreboot project" line in its own comment | Patrick Georgi | 2020-05-06 | 1 | -2/+1 |
| * | src: Remove unused 'include <cpu/x86/cache.h>' | Elyes HAOUAS | 2020-05-01 | 1 | -1/+0 |
| * | src (minus soc and mainboard): Remove copyright notices | Patrick Georgi | 2020-03-17 | 1 | -1/+0 |
| * | nb/intel/{i945,x4x,pineview}: Remove wrapper spd_read_byte() | Kyösti Mälkki | 2020-01-09 | 1 | -7/+2 |
| * | nb/x4x: Rename {ddr,fsb}2{mhz,ps} as {ddr,fsb}_to_{mhz,ps} | Elyes HAOUAS | 2019-06-21 | 1 | -2/+2 |
| * | src/northbridge: Add missing 'include <types.h>' | Elyes HAOUAS | 2019-05-29 | 1 | -0/+1 |
| * | src/northbridge: Remove unneeded include <arch/io.h> | Elyes HAOUAS | 2019-05-15 | 1 | -1/+0 |
| * | {gm45,pineview,sandybridge,x4x}: Use {full,system}_reset() function | Elyes HAOUAS | 2019-05-07 | 1 | -4/+1 |
| * | nb/x4x: Use system_reset() and full_reset() | Elyes HAOUAS | 2019-04-29 | 1 | -6/+4 |
| * | src: Use include <delay.h> when appropriate | Elyes HAOUAS | 2019-04-06 | 1 | -3/+3 |
| * | Move calls to quick_ram_check() before CBMEM init | Kyösti Mälkki | 2019-03-27 | 1 | -2/+0 |
| * | coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX) | Julius Werner | 2019-03-08 | 1 | -3/+3 |
| * | device/pci: Fix PCI accessor headers | Kyösti Mälkki | 2019-03-01 | 1 | -0/+1 |
| * | sb/intel/common: Rename i2c_block_read() to i2c_eeprom_read() | Kyösti Mälkki | 2019-02-01 | 1 | -4/+4 |
| * | mb: Move timestamp_add_now to northbridge x4x | Elyes HAOUAS | 2019-01-10 | 1 | -0/+7 |
| * | northbridge: Remove unneeded include <pc80/mc146818rtc.h> | Elyes HAOUAS | 2018-12-18 | 1 | -1/+0 |
| * | src: Remove unneeded include <lib.h> | Elyes HAOUAS | 2018-11-16 | 1 | -1/+0 |
| * | src: Remove unneeded include "{arch,cpu}/cpu.h" | Elyes HAOUAS | 2018-11-12 | 1 | -0/+1 |
| * | nb/intel/x4x/raminit: Add missing space | Jonathan Neuschäfer | 2018-11-05 | 1 | -1/+1 |
| * | nb/intel/x4x: Fix P45 CAPID max frequency | Arthur Heymans | 2018-10-15 | 1 | -0/+1 |
| * | nb/intel/x4x: Don't use cached settings if CPU FSB has been changed | Arthur Heymans | 2018-09-16 | 1 | -1/+8 |
| * | nb/intel/x4x: Issue a hard reset with empty MRC cache on warm reset | Arthur Heymans | 2018-06-17 | 1 | -0/+5 |
| * | nb/intel/x4x: Work around a quirk | Arthur Heymans | 2018-06-14 | 1 | -0/+21 |
| * | nb/intel/x4x: Add DDR3 JEDEC init | Arthur Heymans | 2018-05-24 | 1 | -0/+3 |
| * | nb/intel/x4x: Rename a things that are not specific to DDR2 | Arthur Heymans | 2018-05-14 | 1 | -11/+1 |
| * | nb/x4x/raminit: Decode ddr3 dimms | Arthur Heymans | 2018-05-14 | 1 | -26/+208 |
| * | nb/intel/x4x: Fix computing page_size | Arthur Heymans | 2018-04-28 | 1 | -2/+3 |
| * | nb/intel/x4x: Use SPI flash to cache raminit results | Arthur Heymans | 2018-04-17 | 1 | -19/+107 |
| * | device/ddr2,ddr3: Rename and move a few things | Arthur Heymans | 2018-02-22 | 1 | -1/+1 |
| * | nb/x4x/raminit: Rewrite SPD decode and timing selection | Arthur Heymans | 2017-12-16 | 1 | -223/+255 |
| * | sb/intel/i82801jx: Add correct PCI ids and change names | Arthur Heymans | 2017-07-21 | 1 | -0/+4 |
| * | nb/intel/x4x: Make raminit less verbose with CONFIG_DEBUG_RAM_SETUP | Arthur Heymans | 2017-05-21 | 1 | -2/+5 |
