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path: root/src/northbridge/intel/x4x/rcven.c
Commit message (Expand)AuthorAgeFilesLines
* nb/intel/x4x: Use write32p and read32pArthur Heymans2021-07-051-1/+1
* nb/intel/x4x: Prepare for x86_64 supportArthur Heymans2021-07-051-1/+2
* nb/intel/x4x/rcven.c: Guard macro parametersAngel Pons2021-05-281-1/+1
* nb/intel/x4x: Use new fixed BAR accessorsAngel Pons2021-04-101-19/+16
* nb/intel/x4x: Reflow long linesAngel Pons2021-04-101-26/+14
* nb/intel/x4x: Reset DQS probe on all channelsAngel Pons2021-01-151-5/+7
* nb/intel/x4x: Place raminit definitions in raminit.hAngel Pons2020-10-141-0/+1
* nb/intel/x4x/iomap.h: Rename to memmap.hAngel Pons2020-09-251-1/+0
* nb/intel/x4x/rcven.c: Rename memory barrier functionAngel Pons2020-07-301-3/+3
* treewide: Remove "this file is part of" linesPatrick Georgi2020-05-111-1/+0
* treewide: replace GPLv2 long form headers with SPDX headerPatrick Georgi2020-05-061-12/+1
* treewide: Move "is part of the coreboot project" line in its own commentPatrick Georgi2020-05-061-2/+1
* src (minus soc and mainboard): Remove copyright noticesPatrick Georgi2020-03-171-2/+0
* nb/intel/x4x/rcven.c: Remove variable set but not usedElyes HAOUAS2019-06-041-2/+2
* device/mmio.h: Add include file for MMIO opsKyösti Mälkki2019-03-041-1/+1
* nb/intel/x4x/rcven.c: Change the verbosity of some messagesArthur Heymans2018-04-171-8/+10
* nb/intel/x4x: Add a convenient macro to loop over bytelanesArthur Heymans2018-04-171-3/+3
* nb/intel/x4x: Clarify the raminit memory mappingArthur Heymans2018-04-171-6/+14
* nb/intel/x4x: Use SPI flash to cache raminit resultsArthur Heymans2018-04-171-1/+6
* nb/intel/x4x/rcven.c: Fix programming coarse offsetArthur Heymans2017-12-121-2/+3
* nb/intel/x4x/raminit: Rework receive enable calibrationArthur Heymans2017-08-201-0/+375
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