coreboot.git - Coreboot firmware sources

	Commit message (Expand)	Author	Age	Files	Lines
*	nb/intel/x4x: Use write32p and read32p	Arthur Heymans	2021-07-05	1	-1/+1
*	nb/intel/x4x: Prepare for x86_64 support	Arthur Heymans	2021-07-05	1	-1/+2
*	nb/intel/x4x/rcven.c: Guard macro parameters	Angel Pons	2021-05-28	1	-1/+1
*	nb/intel/x4x: Use new fixed BAR accessors	Angel Pons	2021-04-10	1	-19/+16
*	nb/intel/x4x: Reflow long lines	Angel Pons	2021-04-10	1	-26/+14
*	nb/intel/x4x: Reset DQS probe on all channels	Angel Pons	2021-01-15	1	-5/+7
*	nb/intel/x4x: Place raminit definitions in raminit.h	Angel Pons	2020-10-14	1	-0/+1
*	nb/intel/x4x/iomap.h: Rename to memmap.h	Angel Pons	2020-09-25	1	-1/+0
*	nb/intel/x4x/rcven.c: Rename memory barrier function	Angel Pons	2020-07-30	1	-3/+3
*	treewide: Remove "this file is part of" lines	Patrick Georgi	2020-05-11	1	-1/+0
*	treewide: replace GPLv2 long form headers with SPDX header	Patrick Georgi	2020-05-06	1	-12/+1
*	treewide: Move "is part of the coreboot project" line in its own comment	Patrick Georgi	2020-05-06	1	-2/+1
*	src (minus soc and mainboard): Remove copyright notices	Patrick Georgi	2020-03-17	1	-2/+0
*	nb/intel/x4x/rcven.c: Remove variable set but not used	Elyes HAOUAS	2019-06-04	1	-2/+2
*	device/mmio.h: Add include file for MMIO ops	Kyösti Mälkki	2019-03-04	1	-1/+1
*	nb/intel/x4x/rcven.c: Change the verbosity of some messages	Arthur Heymans	2018-04-17	1	-8/+10
*	nb/intel/x4x: Add a convenient macro to loop over bytelanes	Arthur Heymans	2018-04-17	1	-3/+3
*	nb/intel/x4x: Clarify the raminit memory mapping	Arthur Heymans	2018-04-17	1	-6/+14
*	nb/intel/x4x: Use SPI flash to cache raminit results	Arthur Heymans	2018-04-17	1	-1/+6
*	nb/intel/x4x/rcven.c: Fix programming coarse offset	Arthur Heymans	2017-12-12	1	-2/+3
*	nb/intel/x4x/raminit: Rework receive enable calibration	Arthur Heymans	2017-08-20	1	-0/+375