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* cbmem_top_chipset: Change the return value to uintptr_tElyes Haouas2022-11-181-3/+2
* nb/intel/x4x: Specify supported memory typesElyes Haouas2022-11-041-0/+5
* nb/x4x/dq_dqs.c: Use 'enum cb_err'Elyes Haouas2022-10-212-12/+12
* nb/intel/x4x/raminit.c: Use 'enum cb_err'Elyes Haouas2022-10-211-2/+2
* treewide: use predicate to check if pci device is on n-th busFabio Aiuto2022-10-061-1/+1
* nb/intel: Use "if (!ptr)" in preference to "if (ptr == NULL)"Elyes Haouas2022-09-141-1/+1
* nb,soc/intel: Handle upper RAM boundaryKyösti Mälkki2022-07-051-6/+1
* nb/intel: Drop local legacy_hole definitionsKyösti Mälkki2022-06-301-7/+3
* device/resource: Modify some resource allocation instancesKyösti Mälkki2022-06-241-1/+1
* device/resource: Add _kb postfix for resource allocatorsKyösti Mälkki2022-06-221-7/+7
* timestamps: Rename timestamps to make names more consistentJakub Czapiga2022-03-081-2/+2
* src: Make PCI ID define names shorterFelix Singer2022-03-071-1/+1
* src: Drop duplicated includesElyes HAOUAS2022-01-011-1/+0
* Rename ECAM-specific MMCONF KconfigsShelley Chen2021-11-103-5/+5
* ACPI: Have common acpi_fill_mcfg()Kyösti Mälkki2021-10-181-8/+0
* src/*: Specify type of `CBFS_SIZE` onceAngel Pons2021-07-261-1/+0
* nb/intel/x4x: Expose x86_64 supportArthur Heymans2021-07-061-0/+1
* nb/intel/x4x: Use write32p and read32pArthur Heymans2021-07-053-13/+13
* nb/intel/x4x: Prepare for x86_64 supportArthur Heymans2021-07-054-14/+16
* cpu/x86: Default to PARALLEL_MP selectedKyösti Mälkki2021-06-071-1/+0
* nb/intel/x4x/rcven.c: Guard macro parametersAngel Pons2021-05-281-1/+1
* src: Retype option API to use unsigned integersAngel Pons2021-05-061-1/+1
* nb/intel: Use get_int_option()Angel Pons2021-04-211-3/+2
* nb/intel/x4x: Refactor sync DLL programming (part 2)Nico Huber2021-04-121-41/+39
* nb/intel/x4x: Refactor sync DLL programming (part 1)Nico Huber2021-04-121-30/+32
* nb/intel/x4x: Sort code in program_dll()Nico Huber2021-04-121-16/+16
* nb/intel/x4x: Use new fixed BAR accessorsAngel Pons2021-04-106-500/+484
* nb/intel/x4x: Correct and use macros for CLKCFGAngel Pons2021-04-104-6/+7
* nb/intel/x4x/dq_dqs.c: Avoid breaking strings over multiple linesAngel Pons2021-04-101-17/+11
* nb/intel/x4x: Add missing newlines to log messageAngel Pons2021-04-101-2/+2
* nb/intel/x4x: Reflow long linesAngel Pons2021-04-106-254/+133
* nb/intel/x4x/dq_dqs.c: Fix typo in variable nameAngel Pons2021-04-101-3/+3
* nb/intel/x4x: Correct sync DLL phase searchAngel Pons2021-04-101-1/+1
* nb/intel: Factor out remaining MCHBAR macrosAngel Pons2021-04-101-10/+0
* device/dram/ddr3: Get rid of useless typedefsAngel Pons2021-04-051-1/+1
* device/device.c: Rename .disable to .vga_disableArthur Heymans2021-02-241-1/+1
* nb/intel/x4x: Use a variable for s3resumeKyösti Mälkki2021-02-231-2/+5
* nb/intel/x4x,sandybridge: Move INITRAM timestampsKyösti Mälkki2021-02-231-1/+2
* nb/intel/x4x,sandybridge: Move romstage_handoff_init() callKyösti Mälkki2021-02-233-11/+6
* nb/intel: Add missing <types.h>Elyes HAOUAS2021-02-161-1/+1
* nb/intel/x4x: Use common {DMI,EP,MCH}BAR accessorsAngel Pons2021-02-105-21/+17
* nb/intel/x4x: Correct DDR3 turnaround tableAngel Pons2021-02-101-6/+6
* nb/intel/x4x: Constify write leveling arraysAngel Pons2021-02-071-2/+2
* nb/intel/x4x: Update write leveling commentAngel Pons2021-02-071-9/+9
* nb/intel/x4x: Constify DDR2 ODT tableAngel Pons2021-02-071-1/+1
* nb/intel/x4x: Clean up RCOMP cosmeticsAngel Pons2021-02-071-49/+31
* nb/intel/x4x: Drop unused first array indexAngel Pons2021-02-071-24/+22
* nb/intel/x4x: Unroll programming RCOMP data groupAngel Pons2021-02-071-12/+19
* nb/intel/x4x: Report if running in async modeAngel Pons2021-02-071-0/+1
* nb/intel/x4x: Factor out setting Tx DLL tap and PIAngel Pons2021-02-071-20/+14
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