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path: root/src/northbridge/intel/x4x
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* nb/intel/x4x: Use new fixed BAR accessorsAngel Pons2021-04-106-500/+484
* nb/intel/x4x: Correct and use macros for CLKCFGAngel Pons2021-04-104-6/+7
* nb/intel/x4x/dq_dqs.c: Avoid breaking strings over multiple linesAngel Pons2021-04-101-17/+11
* nb/intel/x4x: Add missing newlines to log messageAngel Pons2021-04-101-2/+2
* nb/intel/x4x: Reflow long linesAngel Pons2021-04-106-254/+133
* nb/intel/x4x/dq_dqs.c: Fix typo in variable nameAngel Pons2021-04-101-3/+3
* nb/intel/x4x: Correct sync DLL phase searchAngel Pons2021-04-101-1/+1
* nb/intel: Factor out remaining MCHBAR macrosAngel Pons2021-04-101-10/+0
* device/dram/ddr3: Get rid of useless typedefsAngel Pons2021-04-051-1/+1
* device/device.c: Rename .disable to .vga_disableArthur Heymans2021-02-241-1/+1
* nb/intel/x4x: Use a variable for s3resumeKyösti Mälkki2021-02-231-2/+5
* nb/intel/x4x,sandybridge: Move INITRAM timestampsKyösti Mälkki2021-02-231-1/+2
* nb/intel/x4x,sandybridge: Move romstage_handoff_init() callKyösti Mälkki2021-02-233-11/+6
* nb/intel: Add missing <types.h>Elyes HAOUAS2021-02-161-1/+1
* nb/intel/x4x: Use common {DMI,EP,MCH}BAR accessorsAngel Pons2021-02-105-21/+17
* nb/intel/x4x: Correct DDR3 turnaround tableAngel Pons2021-02-101-6/+6
* nb/intel/x4x: Constify write leveling arraysAngel Pons2021-02-071-2/+2
* nb/intel/x4x: Update write leveling commentAngel Pons2021-02-071-9/+9
* nb/intel/x4x: Constify DDR2 ODT tableAngel Pons2021-02-071-1/+1
* nb/intel/x4x: Clean up RCOMP cosmeticsAngel Pons2021-02-071-49/+31
* nb/intel/x4x: Drop unused first array indexAngel Pons2021-02-071-24/+22
* nb/intel/x4x: Unroll programming RCOMP data groupAngel Pons2021-02-071-12/+19
* nb/intel/x4x: Report if running in async modeAngel Pons2021-02-071-0/+1
* nb/intel/x4x: Factor out setting Tx DLL tap and PIAngel Pons2021-02-071-20/+14
* nb/intel/x4x: Correct ctrlset{2,3} register maskAngel Pons2021-02-071-2/+12
* nb/intel/x4x: Clean up cosmetics of raminit tablesAngel Pons2021-02-071-177/+200
* nb/intel/x4x: Drop commented-out statementAngel Pons2021-02-071-2/+0
* intel: Define `RCBA_LENGTH` in Kconfig and use itAngel Pons2021-02-061-1/+1
* intel: Turn `DEFAULT_RCBA` into a Kconfig symbolAngel Pons2021-02-051-2/+1
* nb/intel/x/bootblock.c Revert `include <arch/pci_io_cfg.h>`Angel Pons2021-02-041-1/+1
* treewide [Kconfig]: Remove useless commentElyes HAOUAS2021-02-021-1/+1
* nb/intel/x4x/bootblock.c: include <arch/pci_io_cfg.h>Elyes HAOUAS2021-02-011-1/+1
* nb/intel/x4x: Define and use MMCONF_BUS_NUMBERAngel Pons2021-01-307-54/+21
* device/Kconfig: Declare MMCONF symbols' type onceAngel Pons2021-01-291-1/+0
* cpu/intel/socket_LGA775: Increase DCACHE_RAM_SIZEElyes HAOUAS2021-01-211-1/+0
* northbridge/intel/x4x/dq_dqs.c: Remove repeated wordElyes HAOUAS2021-01-181-1/+1
* northbridge/intel/x4x/raminit_ddr23.c: Remove repeated wordElyes HAOUAS2021-01-181-1/+1
* nb/intel/x4x: Clean up raminit commentsAngel Pons2021-01-153-103/+102
* nb/intel/x4x: Reset DQS probe on all channelsAngel Pons2021-01-151-5/+7
* drivers/intel/gma: Include gfx.asl by default for all platforms...Matt DeVillier2020-12-301-0/+3
* cbfs: Enable CBFS mcache on most chipsetsJulius Werner2020-12-021-0/+1
* nb/intel/x4x: Place raminit definitions in raminit.hAngel Pons2020-10-148-245/+259
* nb/intel/x4x: Move register headers into a subfolderAngel Pons2020-10-142-4/+4
* nb/intel/x4x: Clean up DMIBAR/EPBAR definitionsAngel Pons2020-10-142-44/+92
* drivers/spi: Add BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES configShelley Chen2020-10-021-0/+1
* nb/intel/x4x/x4x.h: Clean up cosmeticsAngel Pons2020-09-251-58/+53
* nb/intel/x4x/iomap.h: Rename to memmap.hAngel Pons2020-09-2510-12/+6
* src/northbridge: Drop unneeded empty linesElyes HAOUAS2020-09-215-7/+0
* nb/intel/x4x: Clean up TPM-related codeAngel Pons2020-09-172-6/+5
* mrc_cache: Add mrc_cache fetch functions to support non-x86 platformsShelley Chen2020-08-241-8/+6
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