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* src: Use 'include <string.h>' when appropriateElyes HAOUAS2019-03-2027-31/+13
* Fix 'unsigned int' to bare use of 'unsigned'Subrata Banik2019-03-192-9/+9
* nb/intel/i945: Remove 2nd write on SLOTCAP (R/WO)Elyes HAOUAS2019-03-181-5/+0
* src: Drop unused '#include <halt.h>'Elyes HAOUAS2019-03-165-4/+1
* drivers/intel/fsp1_0: Deduplicate codePatrick Rudolph2019-03-161-13/+0
* src: Drop unused 'include <arch/ioapic.h>'Elyes HAOUAS2019-03-131-2/+0
* nb/intel/stage_cache.c: Drop unnecessary includesElyes HAOUAS2019-03-134-12/+4
* {mb,nb/pineview}/*.asl: Remove unneeded include i82801gx.hElyes HAOUAS2019-03-131-1/+0
* coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)Julius Werner2019-03-0830-81/+81
* src: Drop unused include <arch/acpi.h>Elyes HAOUAS2019-03-064-4/+0
* nb/intel/sandybridge: Reserve CAR region with !NATIVE_RAMINITKyösti Mälkki2019-03-061-0/+26
* Remove DEFAULT_PCIEXBAR aliasKyösti Mälkki2019-03-0615-22/+8
* device/mmio.h: Add include file for MMIO opsKyösti Mälkki2019-03-0423-13/+25
* arch/io.h: Drop unnecessary includeKyösti Mälkki2019-03-0448-48/+0
* arch/io.h: Add missing includesKyösti Mälkki2019-03-041-0/+1
* nb/intel/i945: Remove redundant use of ACPI offset operatorElyes HAOUAS2019-03-041-9/+9
* device/pci: Fix PCI accessor headersKyösti Mälkki2019-03-0164-0/+64
* nb/intel/nehalem: Remove CAR_GLOBAL useArthur Heymans2019-02-121-2/+1
* postcar: Make more use of postcar_frame_add_romcache()Nico Huber2019-02-121-2/+1
* nb/intel/sandybridge: Use pcidev_on_root()Kyösti Mälkki2019-02-101-1/+1
* src: Remove unused include device/pnp_def.hElyes HAOUAS2019-02-075-5/+0
* nb/intel/gm45: Use a common romstageArthur Heymans2019-02-063-0/+143
* sb/intel/common: Rename i2c_block_read() to i2c_eeprom_read()Kyösti Mälkki2019-02-013-6/+6
* nb/intel/i945: Fix typo on DMIBAR32(0x334)Elyes HAOUAS2019-01-271-1/+1
* nb/intel/i945: Remove initialization already done at bootblockElyes HAOUAS2019-01-272-7/+0
* nb/intel/sandybridge/acpi: Add RMRR entry for iGPUNico Huber2019-01-251-1/+28
* nb/intel/x4x: Put stage cache in TSEGArthur Heymans2019-01-243-0/+40
* nb/intel/pineview: Put stage cache in TSEGArthur Heymans2019-01-243-0/+40
* nb/intel/gm45: Put stage cache in TSEGArthur Heymans2019-01-243-0/+41
* nb/intel/i945: Put stage cache in TSEGArthur Heymans2019-01-243-0/+41
* i945,ICH7: Write on RPFN only onceElyes HAOUAS2019-01-231-2/+0
* nb/intel/pineview: Use parallel MP initArthur Heymans2019-01-232-21/+2
* nb/intel/x4x: Use parallel MP initArthur Heymans2019-01-232-21/+2
* nb/intel/i945: Use parallel MP initArthur Heymans2019-01-232-21/+2
* nb/intel/gm45: Use parallel MP initArthur Heymans2019-01-232-21/+2
* Drop leftover debug function declarationsKyösti Mälkki2019-01-234-24/+0
* cpu/intel/model_206ax: Use parallel MP initArthur Heymans2019-01-221-1/+1
* nb/intel/sandybridge: Remove the C native graphic initArthur Heymans2019-01-165-1020/+2
* buildsystem: Promote rules.h to default includeKyösti Mälkki2019-01-163-3/+0
* nb/intel/pineview: Select 1M TSEGArthur Heymans2019-01-141-4/+4
* nb/intel/pineview: Move the boilerplate mainboard_romstage_entryArthur Heymans2019-01-143-0/+126
* nb/intel/{i945,pineview}: Remove unused functionArthur Heymans2019-01-142-6/+0
* {mb,nb,soc/fsp_baytrail}: Get rid of dump_mem()Elyes HAOUAS2019-01-138-30/+0
* nb/intel/x4x: Remove spurious pcidev_on_root() usageNico Huber2019-01-131-5/+1
* nb/intel/i945: Reduce pcidev_on_root() callsNico Huber2019-01-131-7/+7
* mb: Move timestamp_add_now to northbridge x4xElyes HAOUAS2019-01-101-0/+7
* aopen/dxplplusu: Move timestamps to common codeKyösti Mälkki2019-01-101-0/+5
* cpu/intel: Use the common code to initialize the romstage timestampsArthur Heymans2019-01-091-3/+0
* nb/intel/gm45: Remove the C native graphic initArthur Heymans2019-01-072-591/+11
* usbdebug: Make the EHCI debug console work in the bootblockArthur Heymans2019-01-061-1/+1