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* nb/intel/ironlake: Clean up code style (except raminit)Angel Pons2020-07-024-38/+35
* nb/intel/ironlake/northbridge.c: Drop thunk functionsAngel Pons2020-07-011-13/+2
* nb/intel/ironlake: Drop copy-pasted and unused macroAngel Pons2020-07-011-2/+0
* nb/intel/ironlake: Use `pci_update_config32()`Angel Pons2020-07-011-2/+1
* nb/intel/ironlake: Simplify BAR handlingAngel Pons2020-07-011-7/+3
* nb/intel/ironlake/ironlake.h: Clean upAngel Pons2020-07-011-75/+52
* nb/intel/ironlake: Drop copy-pasted and dead codeAngel Pons2020-07-011-29/+3
* nb/intel/ironlake: Remove unused structsAngel Pons2020-07-011-32/+0
* nb/intel/pineview: Drop undefined function declarationAngel Pons2020-07-011-3/+0
* sb/intel/i82801ix: Use pmutil.h definitionsAngel Pons2020-06-271-0/+1
* nb/intel/sandybridge/gma.c: Remove useless if conditionEvgeny Zinoviev2020-06-221-12/+9
* device/smbus_host: Declare common early SMBus prototypesKyösti Mälkki2020-06-2210-11/+11
* nb/intel/haswell: Use 16-bit ops on PCI COMMANDAngel Pons2020-06-221-1/+1
* i945 boards: Factor out MAX_CPUSAngel Pons2020-06-151-0/+4
* x4x boards: Factor out MAX_CPUSAngel Pons2020-06-151-0/+4
* nb/intel/i945/rcven.c: Correct commentAngel Pons2020-06-121-1/+1
* nb/intel/i945: Clean up raminit coding styleAngel Pons2020-06-122-32/+32
* nb/intel/i945: Use PCI bitwise opsAngel Pons2020-06-103-119/+39
* nb/intel/x4x: Drop unused `pci_ops.h` includeAngel Pons2020-06-101-1/+0
* nb/intel/pineview: Use PCI bitwise opsAngel Pons2020-06-102-11/+6
* nb/intel/x4x: Use PCI bitwise opsAngel Pons2020-06-093-18/+10
* nb/intel/haswell: Use PCI bitwise opsAngel Pons2020-06-092-7/+2
* nb/intel/sandybridge: Use MCHBAR bitwise opsAngel Pons2020-06-091-15/+5
* nb/intel/sandybridge: Use PCI bitwise opsAngel Pons2020-06-093-36/+15
* nb/intel/gm45/iommu.c: Fix regression when updating PCI commandAngel Pons2020-06-091-3/+1
* src: Use pci_dev_ops_pci where applicableAngel Pons2020-06-0618-91/+19
* src: Remove unused 'include <cpu/x86/mtrr.h>'Elyes HAOUAS2020-06-062-2/+0
* src: Remove unused '#include <cpu/x86/smm.h>'Elyes HAOUAS2020-06-061-1/+0
* northbridge/intel/sandybridge: Mask lower 20 bits of TOLUD and TOLM in hostbr...Furquan Shaikh2020-06-031-2/+6
* northbridge/intel/sandybridge: Update hostbridge.asl to ASL2.0 syntaxFurquan Shaikh2020-06-031-27/+26
* northbridge/intel/haswell: Mask lower 20 bits of TOLUD and TOLM in hostbridge...Furquan Shaikh2020-06-031-2/+6
* northbridge/intel/haswell: Update hostbridge.asl to ASL2.0Furquan Shaikh2020-06-031-41/+40
* src: Remove redundant includesElyes HAOUAS2020-06-021-1/+0
* src: Remove unused 'include <bootmode.h>'Elyes HAOUAS2020-06-022-2/+0
* src: Remove unused '#include <cpu/x86/lapic.h>'Elyes HAOUAS2020-06-021-1/+0
* intel/gma: Only enable bus mastering if we are going to use itNico Huber2020-05-277-46/+18
* intel/gma: Don't bluntly enable I/ONico Huber2020-05-277-11/+9
* drivers/intel/gma: Move IGD OpRegion to CBMEMNico Huber2020-05-277-307/+14
* northbridge/intel/i945: Mark legacy VGA memory as reservedFurquan Shaikh2020-05-261-0/+2
* northbridge/amd: Keep using old resource allocatorFurquan Shaikh2020-05-266-0/+6
* device_util,agesa/family14: Do not consider unassigned resources in find_pci_...Furquan Shaikh2020-05-261-1/+2
* nb/intel: Fix 16-bit read/write PCI_COMMAND registerElyes HAOUAS2020-05-264-19/+6
* nb/intel/sandybridge: Use the new IOSAV struct APIAngel Pons2020-05-213-469/+1746
* nb/intel/sandybridge: Drop unused parametersAngel Pons2020-05-212-32/+31
* nb/intel/sandybridge: Redefine IOSAV_SUBSEQUENCEAngel Pons2020-05-213-7/+104
* nb/intel/sandybridge: Truncate IOSAV subseq gapsAngel Pons2020-05-211-3/+3
* nb/intel/sandybridge: Replace macros with functionsAngel Pons2020-05-211-4/+8
* nb/intel/sandybridge: Refactor IOSAV_RUN_ONCEAngel Pons2020-05-211-27/+31
* nb/intel/sandybridge: Refactor IOSAV_SUBSEQUENCE againAngel Pons2020-05-213-157/+149
* nb/intel/sandybridge: Do not hardcode resource indicesAngel Pons2020-05-191-5/+6
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