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* nb/intel/i440bx: Enable bootblock consoleKeith Hui2021-04-061-1/+0
* arch/x86: Provide readXp/writeXp helpers in arch/mmio.hAngel Pons2021-04-061-10/+0
* nb/intel/haswell: Ensure MCH has acked raminitAngel Pons2021-04-061-0/+10
* nb/intel/sandybridge: Drop `pci_mmio_size`Angel Pons2021-04-052-24/+3
* nb/intel/ironlake: Drop `pci_mmio_size`Angel Pons2021-04-052-23/+1
* nb/intel/sandybridge: Rename `pdwm_mode` enumAngel Pons2021-04-052-3/+3
* nb/intel/i945/raminit.c: Replace `DIMM0`Angel Pons2021-04-051-1/+1
* nb/intel/i945: Refactor `dump_spd_registers` functionAngel Pons2021-04-053-9/+10
* device/dram/ddr3: Get rid of useless typedefsAngel Pons2021-04-054-5/+5
* nb/intel/pineview: Correct COMP register writeAngel Pons2021-04-021-2/+2
* nb/intel/pineview/raminit.c: Correct clkset1 programmingAngel Pons2021-03-281-2/+1
* nb/intel/pineview: Correct HICLKGTCTL writeAngel Pons2021-03-281-1/+1
* nb/intel/pineview: Drop MCHBAR macro from DMIBAR accessAngel Pons2021-03-281-1/+1
* nb/intel/ironlake/quickpath.c: Correct one valueAngel Pons2021-03-281-1/+1
* nb/intel/ironlake: Drop copy-pasted finalisation stepsAngel Pons2021-03-281-15/+0
* nb/intel/haswell: Replace `DMIBAR64` and `EPBAR64`Angel Pons2021-03-282-8/+8
* nb/intel/haswell: Move USB config API into Lynx PointAngel Pons2021-03-251-42/+0
* nb/intel/haswell: Decouple mainboard USB config from MRCAngel Pons2021-03-253-19/+85
* nb/intel/haswell: Limit mainboard USB config array lengthsAngel Pons2021-03-232-4/+10
* nb/intel/haswell: Use unshifted SPD addresses in mainboardsAngel Pons2021-03-232-3/+6
* nb/intel/haswell: Confine `pei_data` uses to raminit.cAngel Pons2021-03-233-133/+127
* nb/intel/haswell: Consolidate memory-down SPD handlingAngel Pons2021-03-192-7/+43
* mb/google/slippy: Correct memory-down SPD handlingAngel Pons2021-03-191-4/+5
* sb/intel/lynxpoint: Move S3 check out of `early_pch_init`Angel Pons2021-03-151-12/+7
* sb/intel/lynxpoint: Replace HPET_ADDRAngel Pons2021-03-151-1/+1
* nb/intel/haswell: Finalize northbridge in ramstageAngel Pons2021-03-104-40/+33
* nb/intel/haswell/pcie.c: Add missing pre-ASPM initAngel Pons2021-03-103-0/+125
* nb/intel/haswell: Indent PCI ops with tabsAngel Pons2021-03-071-5/+5
* nb/intel/sandybridge: Clean up `dram_timing` functionAngel Pons2021-03-011-27/+11
* nb/intel/haswell: Fix DPR size handlingTim Wawrzynczak2021-03-011-2/+2
* nb/intel/sandybridge: Ensure tXP and tXPDLL do not overflowAngel Pons2021-03-011-3/+4
* memory_info.h: Store SMBIOS error correction typeAngel Pons2021-03-012-6/+6
* nb/intel/ironlake: Avoid casting pointers to structsAngel Pons2021-02-271-14/+16
* nb/intel/ironlake: Handle broken ME firmwareAngel Pons2021-02-271-3/+5
* nb/intel/ironlake: Rewrite early QPI initAngel Pons2021-02-243-68/+102
* nb/intel/haswell/northbridge.c: Correct DPR handlingAngel Pons2021-02-241-14/+11
* nb/intel/ironlake: Correct even more replay issuesAngel Pons2021-02-241-7/+10
* nb/intel/ironlake: Relocate early QuickPath initAngel Pons2021-02-243-103/+107
* nb/intel/ironlake: Deduplicate programming 274/265 valuesAngel Pons2021-02-241-30/+16
* nb/intel/ironlake: Split out some QuickPath init codeAngel Pons2021-02-244-737/+755
* nb/intel/ironlake: Remove unnecessary declarationAngel Pons2021-02-241-4/+0
* nb/intel/ironlake: Fix more replay issuesAngel Pons2021-02-241-24/+33
* nb/intel/ironlake: Fix some replay issuesAngel Pons2021-02-241-47/+64
* nb/intel/ironlake: Correct `set_4cf`Angel Pons2021-02-241-15/+16
* device/device.c: Rename .disable to .vga_disableArthur Heymans2021-02-243-3/+3
* nb/intel/haswell/pcie.c: remove disable NOPArthur Heymans2021-02-241-7/+0
* nb/intel/sandybridge/pcie.c: remove disable NOPArthur Heymans2021-02-241-7/+0
* nb/intel/ironlake: Drop redundant clear of SLP_TYPKyösti Mälkki2021-02-232-15/+0
* nb/intel/x4x: Use a variable for s3resumeKyösti Mälkki2021-02-231-2/+5
* nb/intel/x4x,sandybridge: Move INITRAM timestampsKyösti Mälkki2021-02-234-7/+7
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