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* sec/intel/txt/Kconfig: Remove the menu for including ACMsArthur Heymans2020-10-281-4/+0
* sec/intel/txt/Makefile.inc: Include ACMs using Kconfig variablesArthur Heymans2020-10-281-10/+11
* security/vboot: fix policy digest for nvmem spacesAndrey Pronin2020-10-281-9/+37
* vboot: Disable vboot functions in SMMJulius Werner2020-10-261-1/+1
* security/tpm/tspi/crtm: Add line break to debug messagesFrans Hendriks2020-10-261-2/+2
* sec/intel/txt: Split MTRR setup ASM code into a macroAngel Pons2020-10-222-64/+84
* sec/intel/txt: Add `enable_getsec_or_reset` functionAngel Pons2020-10-222-0/+33
* sec/intel/txt: Extract BIOS ACM loading into a functionAngel Pons2020-10-221-28/+45
* sec/intel/txt: Only run LockConfig for LT-SXAngel Pons2020-10-222-7/+18
* sec/intel/txt: Always run SCHECK on regular bootsAngel Pons2020-10-221-7/+8
* sec/intel/txt: Allow skipping ACM NOP functionAngel Pons2020-10-222-10/+19
* sec/intel/txt/ramstage.c: Do not init the heap on S3 resumeAngel Pons2020-10-221-1/+3
* sec/intel/txt/ramstage.c: Extract heap init into a functionAngel Pons2020-10-221-96/+101
* sec/intel/txt: Add and fill in BIOS Specification infoAngel Pons2020-10-221-0/+8
* sec/intel/txt/common.c: Only log ACM error on failureAngel Pons2020-10-221-2/+0
* sec/intel/txt: Move DPR size to KconfigAngel Pons2020-10-222-1/+10
* security/vboot: Remove all tpm 1.2 functions for mrc hash in the tpmShelley Chen2020-10-221-70/+41
* mrc_cache: Add tpm_hash_index field to cache_region structShelley Chen2020-10-201-8/+0
* security/vboot: Add new TPM NVRAM index MRC_RW_HASH_NV_INDEXShelley Chen2020-10-202-10/+40
* security/vboot: Make mrc_cache hash functions genericShelley Chen2020-10-206-59/+73
* mrc_cache: Move mrc_cache_*_hash functions into mrc_cache driverShelley Chen2020-10-201-0/+1
* mrc_cache: Add config MRC_SAVE_HASH_IN_TPMShelley Chen2020-10-202-1/+2
* security/vboot: Rename mem_init.h to mrc_cache_hash_tpm.hShelley Chen2020-10-192-1/+20
* intel/txt: Add `txt_get_chipset_dpr` functionAngel Pons2020-10-172-7/+46
* security/intel/txt: Improve MTRR setup for GETSEC[ENTERACCS]Angel Pons2020-10-171-17/+86
* sec/intel/txt: Bail if var MTRRs cannot snugly cache the BIOS ACMAngel Pons2020-10-171-0/+12
* sec/intel/txt/getsec_enteraccs.S: Save and restore MTRR_DEF_TYPEArthur Heymans2020-10-151-6/+2
* security/intel/txt: Use `smm_region()` to get TSEG baseAngel Pons2020-10-152-5/+16
* security/intel/txt: Add and use DPR register layoutAngel Pons2020-10-122-21/+27
* security/intel/txt: Clean up includesAngel Pons2020-10-126-16/+11
* security/intel/stm: Add options for STM buildEugene Myers2020-10-123-7/+123
* security/intel/txt: Print chipset as hex valueChristian Walter2020-10-081-1/+1
* security/intel/stm: Fix size_t printf format errorFelix Held2020-10-011-1/+1
* security/intel/stm: Fix size_t printf format errorEugene D Myers2020-09-301-1/+1
* src/security: Drop unneeded empty linesElyes HAOUAS2020-09-2111-14/+0
* security/tpm/tss/tcg-2.0: add const to marshalling functionsCaveh Jalali2020-09-212-30/+30
* security/intel/txt/getsec.c: Do not check lock bitAngel Pons2020-08-301-1/+1
* security/intel/txt: Add missing definitionsAngel Pons2020-08-301-0/+8
* drivers/spi/tpm: Enable long cr50 ready pulses for Tiger Lake systemsJes Klinke2020-08-201-0/+7
* src: Remove unused 'include <lib.h>'Elyes HAOUAS2020-08-181-1/+0
* src: Remove unused 'include <boot_device.h>'Elyes HAOUAS2020-08-181-1/+0
* security/vboot/Makefile.inc: Update regions-for-file functionSridhar Siricilla2020-08-131-5/+6
* security/intel/txt: Fix variable MTRR handlingAngel Pons2020-08-071-48/+47
* security/intel/txt: Allow using CF9 reset, tooAngel Pons2020-08-072-2/+18
* security/intel/txt: Avoid shifting by a negative valueJohn Zhao2020-08-061-0/+3
* security/intel/txt: Add Intel TXT supportPhilipp Deppenwiese2020-07-3111-9/+1829
* src: Change BOOL CONFIG_ to CONFIG() in comments & stringsMartin Roth2020-07-261-2/+2
* src: Remove unused 'include <cbmem.h>'Elyes HAOUAS2020-07-263-3/+0
* security/intel/stm: Add missing <stdbool.h>Angel Pons2020-07-213-0/+3
* security/vboot: ensure that NVMEM is saved on every kernel space writeJett Rink2020-07-151-0/+10
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