coreboot.git - Coreboot firmware sources

	Commit message (Expand)	Author	Age	Files	Lines
*	cbfs: Simplify load/map API names, remove type arguments	Julius Werner	2020-12-02	3	-10/+8
*	cbfs: Move more stuff into cbfs_boot_lookup()	Julius Werner	2020-12-02	2	-12/+8
*	cbfs: Add metadata cache	Julius Werner	2020-11-21	2	-9/+39
*	vboot: stop implementing VbExDisplayScreen	Joel Kitching	2020-11-18	1	-16/+0
*	src: Add missing 'include <console/console.h>'	Elyes HAOUAS	2020-11-17	1	-0/+1
*	sec/intel/cbnt: Stitch in ACMs in the coreboot image	Arthur Heymans	2020-11-10	6	-0/+59
*	security/vboot: Add Kconfig symbol to set hashing block size	Martin Roth	2020-11-06	2	-3/+12
*	haswell: Add Intel TXT support in romstage	Angel Pons	2020-11-04	5	-0/+182
*	sec/intel/txt: Add support for running SCLEAN in romstage	Angel Pons	2020-11-04	3	-0/+186
*	sec/intel/txt/Kconfig: Remove the menu for including ACMs	Arthur Heymans	2020-10-28	1	-4/+0
*	sec/intel/txt/Makefile.inc: Include ACMs using Kconfig variables	Arthur Heymans	2020-10-28	1	-10/+11
*	security/vboot: fix policy digest for nvmem spaces	Andrey Pronin	2020-10-28	1	-9/+37
*	vboot: Disable vboot functions in SMM	Julius Werner	2020-10-26	1	-1/+1
*	security/tpm/tspi/crtm: Add line break to debug messages	Frans Hendriks	2020-10-26	1	-2/+2
*	sec/intel/txt: Split MTRR setup ASM code into a macro	Angel Pons	2020-10-22	2	-64/+84
*	sec/intel/txt: Add `enable_getsec_or_reset` function	Angel Pons	2020-10-22	2	-0/+33
*	sec/intel/txt: Extract BIOS ACM loading into a function	Angel Pons	2020-10-22	1	-28/+45
*	sec/intel/txt: Only run LockConfig for LT-SX	Angel Pons	2020-10-22	2	-7/+18
*	sec/intel/txt: Always run SCHECK on regular boots	Angel Pons	2020-10-22	1	-7/+8
*	sec/intel/txt: Allow skipping ACM NOP function	Angel Pons	2020-10-22	2	-10/+19
*	sec/intel/txt/ramstage.c: Do not init the heap on S3 resume	Angel Pons	2020-10-22	1	-1/+3
*	sec/intel/txt/ramstage.c: Extract heap init into a function	Angel Pons	2020-10-22	1	-96/+101
*	sec/intel/txt: Add and fill in BIOS Specification info	Angel Pons	2020-10-22	1	-0/+8
*	sec/intel/txt/common.c: Only log ACM error on failure	Angel Pons	2020-10-22	1	-2/+0
*	sec/intel/txt: Move DPR size to Kconfig	Angel Pons	2020-10-22	2	-1/+10
*	security/vboot: Remove all tpm 1.2 functions for mrc hash in the tpm	Shelley Chen	2020-10-22	1	-70/+41
*	mrc_cache: Add tpm_hash_index field to cache_region struct	Shelley Chen	2020-10-20	1	-8/+0
*	security/vboot: Add new TPM NVRAM index MRC_RW_HASH_NV_INDEX	Shelley Chen	2020-10-20	2	-10/+40
*	security/vboot: Make mrc_cache hash functions generic	Shelley Chen	2020-10-20	6	-59/+73
*	mrc_cache: Move mrc_cache_*_hash functions into mrc_cache driver	Shelley Chen	2020-10-20	1	-0/+1
*	mrc_cache: Add config MRC_SAVE_HASH_IN_TPM	Shelley Chen	2020-10-20	2	-1/+2
*	security/vboot: Rename mem_init.h to mrc_cache_hash_tpm.h	Shelley Chen	2020-10-19	2	-1/+20
*	intel/txt: Add `txt_get_chipset_dpr` function	Angel Pons	2020-10-17	2	-7/+46
*	security/intel/txt: Improve MTRR setup for GETSEC[ENTERACCS]	Angel Pons	2020-10-17	1	-17/+86
*	sec/intel/txt: Bail if var MTRRs cannot snugly cache the BIOS ACM	Angel Pons	2020-10-17	1	-0/+12
*	sec/intel/txt/getsec_enteraccs.S: Save and restore MTRR_DEF_TYPE	Arthur Heymans	2020-10-15	1	-6/+2
*	security/intel/txt: Use `smm_region()` to get TSEG base	Angel Pons	2020-10-15	2	-5/+16
*	security/intel/txt: Add and use DPR register layout	Angel Pons	2020-10-12	2	-21/+27
*	security/intel/txt: Clean up includes	Angel Pons	2020-10-12	6	-16/+11
*	security/intel/stm: Add options for STM build	Eugene Myers	2020-10-12	3	-7/+123
*	security/intel/txt: Print chipset as hex value	Christian Walter	2020-10-08	1	-1/+1
*	security/intel/stm: Fix size_t printf format error	Felix Held	2020-10-01	1	-1/+1
*	security/intel/stm: Fix size_t printf format error	Eugene D Myers	2020-09-30	1	-1/+1
*	src/security: Drop unneeded empty lines	Elyes HAOUAS	2020-09-21	11	-14/+0
*	security/tpm/tss/tcg-2.0: add const to marshalling functions	Caveh Jalali	2020-09-21	2	-30/+30
*	security/intel/txt/getsec.c: Do not check lock bit	Angel Pons	2020-08-30	1	-1/+1
*	security/intel/txt: Add missing definitions	Angel Pons	2020-08-30	1	-0/+8
*	drivers/spi/tpm: Enable long cr50 ready pulses for Tiger Lake systems	Jes Klinke	2020-08-20	1	-0/+7
*	src: Remove unused 'include <lib.h>'	Elyes HAOUAS	2020-08-18	1	-1/+0
*	src: Remove unused 'include <boot_device.h>'	Elyes HAOUAS	2020-08-18	1	-1/+0