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path: root/src/soc/amd/mendocino/Kconfig
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* soc/amd: factor out non-CAR romstage to common codeFelix Held2024-01-201-0/+1
* soc/amd/common/acpi: factor out common MADT codeFelix Held2024-01-111-0/+1
* soc/amd/common: Move PCIe CLKREQ programming under fspMatt DeVillier2023-12-061-1/+1
* soc/amd/mendocino: Conditionally select HAVE_FSP_LOGO_SUPPORTKarthikeyan Ramasubramanian2023-11-031-0/+1
* soc/amd/*/Kconfig: rework SPL optionsFelix Held2023-10-251-33/+1
* soc/amd: rework SPL file override and SPL fusing handlingFelix Held2023-10-041-16/+17
* soc/amd: introduce SOC_AMD_COMMON_BLOCK_DATA_FABRIC_NP_REGIONFelix Held2023-09-181-0/+1
* soc/amd/mendocino: Specify and use FSP binaries for platformMatt DeVillier2023-09-041-0/+15
* util/amdfwtool: Deal with psp position in flash offset directlyZheng Bao2023-09-011-33/+0
* treewide: Get rid of "NO_DDRx" selectionElyes Haouas2023-08-091-4/+0
* soc/amd/mendocino: select SOC_AMD_COMMON_BLOCK_CPU_SYNC_PSP_ADDR_MSRMatt DeVillier2023-08-011-0/+1
* soc/amd/common/acpimmio: factor out IO port access to PM registersFelix Held2023-07-171-0/+1
* soc/amd/mendocino/chip: use common data fabric domain resource codeFelix Held2023-06-071-0/+1
* soc/amd/mendocino: drop code for non-existing eMMC controllerFelix Held2023-04-221-1/+0
* soc/amd/common/block/lpc/spi_dma: Leverage CBFS_CACHE when using SPI DMAKarthikeyan Ramasubramanian2023-04-191-1/+1
* soc/amd/common/block/cpu/Kconfig: drop FAM17H_19H suffix from TSC optionFelix Held2023-03-291-1/+1
* soc/amd/common/cpu/tsc: factor out family-specific get_pstate_core_freqFelix Held2023-03-291-0/+1
* soc/amd: introduce and use get_uvolts_from_vid for SVI2 and SVI3Felix Held2023-03-271-0/+1
* soc/amd/mendocino: Set up SoC-specific XHCI definesRobert Zieba2023-03-091-0/+1
* soc/amd: factor out ACPI_SSDT_PSD_INDEPENDENT to common AMD ACPI KconfigFelix Held2023-03-081-8/+0
* soc/amd/mendocino/acpi: rework C state info table handlingFelix Held2023-03-081-0/+1
* soc/amd/mendocino: Populate type 0x63 entry with right MRC CacheKarthikeyan Ramasubramanian2023-02-271-0/+1
* soc/amd/mendocino: Generalize check for selective GOP initMatt DeVillier2023-02-231-0/+1
* soc/amd/mendocino/Kconfig: add VGA BIOS ID and file defaultsFelix Held2023-02-161-0/+10
* soc/amd(MDN/PHX/Glinda): Update DISABLE_KEYBOARD_RESET_PIN helpMartin Roth2023-02-101-4/+1
* soc/amd: Use common reset code for CZN & MDN SoCsMartin Roth2023-02-041-0/+1
* soc/amd/mendocino: PSP_INCLUDES_HSPKarthikeyan Ramasubramanian2023-01-151-0/+1
* soc/amd/mendocino: use common SMU S3/4/5 entry message codeFelix Held2023-01-131-0/+1
* soc/amd/mendocino: Use common fsp-s preloaderFred Reitberger2023-01-121-0/+1
* soc/amd: Remove dummy SOC_SPECIFIC_OPTIONSElyes Haouas2023-01-091-18/+15
* soc/amd/mendocino/Kconfig: Remove TODO after reviewFred Reitberger2023-01-091-20/+18
* soc/amd/mendocino: Split the EFS from the AMDFW bodyKarthikeyan Ramasubramanian2022-12-241-2/+2
* soc/amd/mendocino: add dptc tablet mode supportChris.Wang2022-12-201-0/+14
* soc/amd/mendocino: Enable LPC SPI DMAKarthikeyan Ramasubramanian2022-12-091-0/+1
* soc/amd/mendocino: Increase CBFS_MCACHE sizeKarthikeyan Ramasubramanian2022-11-211-2/+2
* arch/x86/Kconfig: Move AMD stages arch to common codeArthur Heymans2022-11-141-7/+0
* soc/amd/mendocino: Enable x86 SHA acceleratorKarthikeyan Ramasubramanian2022-11-071-0/+1
* soc/amd: Specify memory types supported by each chipMartin Roth2022-11-041-0/+5
* soc/amd/mendocino: Add code for printing STB to boot logMartin Roth2022-10-281-0/+1
* soc/amd/mendocino: Enable GPP clk req disabling for disabled devicesRobert Zieba2022-10-261-0/+1
* soc/amd: factor out common eMMC codeFelix Held2022-10-141-0/+1
* soc/amd/{CZN,MDN,PCO}: Fix building with only single RW regionMatt DeVillier2022-10-071-1/+5
* soc/amd/mendocino: Add support for separate RW A/B partition SPL fileFelix Held2022-09-141-0/+15
* soc/amd: Refactor DPTC Tablet ModeTim Van Patten2022-09-121-1/+1
* soc/amd/mendocino/Kconfig: Enable APOB_HASHFred Reitberger2022-09-071-1/+2
* soc/amd/mendocino/Kconfig: select extended eSPI decode range supportFelix Held2022-08-311-1/+2
* soc/amd/mendocino: enable CPPC featureFelix Held2022-08-181-0/+2
* soc/amd/mendocino: clear Port80 enable bit in ESPI DecodeJon Murphy2022-08-121-1/+0
* treewide: Rename Sabrina to MendocinoJon Murphy2022-08-111-0/+509
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