coreboot.git - Coreboot firmware sources

	Commit message (Expand)	Author	Age	Files	Lines
*	amd/mendocino/root_complex: Throttle SOC during low/no battery	Tim Van Patten	2022-09-19	1	-0/+12
*	amd/mendocino/acpi/soc: Add DPTC Support	Tim Van Patten	2022-09-19	1	-0/+7
*	soc/amd/mendocino: Add low/no battery VRM limit registers	Tim Van Patten	2022-09-19	1	-0/+4
*	amd/mendocino/root_complex: Set DPTC VRM limit values	Tim Van Patten	2022-09-19	1	-3/+19
*	soc/amd/mendocino: Add VRM limit DPTC registers	Tim Van Patten	2022-09-19	1	-0/+4
*	soc/amd/mendocino/acpi: Add support for shared TPM_I2C controller	Jan Dabros	2022-09-19	1	-0/+7
*	amd/mendocino: Control DPTC with only Kconfig	Tim Van Patten	2022-09-15	2	-7/+3
*	acpi/soc: Conditionally include dptc.asl	Tim Van Patten	2022-09-14	1	-0/+2
*	cpu/amd/smm: Move MP & SMM init in a common place	Arthur Heymans	2022-09-14	1	-32/+2
*	soc/amd: Recalculate the field power in PSS table entry	Zheng Bao	2022-09-14	1	-3/+4
*	soc/amd/mendocino: Add support for separate RW A/B partition SPL file	Felix Held	2022-09-14	2	-1/+24
*	soc/amd: Remove unsupported DPTC tablet mode settings	Tim Van Patten	2022-09-12	2	-18/+2
*	soc/amd: Refactor DPTC Tablet Mode	Tim Van Patten	2022-09-12	4	-12/+17
*	soc/amd/mendocino/Kconfig: Enable APOB_HASH	Fred Reitberger	2022-09-07	1	-1/+2
*	amd: Convert dptc_enable to bool	Tim Van Patten	2022-09-07	1	-2/+2
*	amd/*/Makefile.inc: Put common words into common Makefile.inc	Zheng Bao	2022-09-01	1	-8/+0
*	soc/amd/mendocino/Kconfig: select extended eSPI decode range support	Felix Held	2022-08-31	1	-1/+2
*	soc/amd/mendocino/psp_verstage/svc: Fix reset_system type	Karthikeyan Ramasubramanian	2022-08-29	1	-1/+1
*	soc/amd: rework SPI flash MMIO region handling	Felix Held	2022-08-25	1	-1/+3
*	soc/amd/mendocino: enable CPPC feature	Felix Held	2022-08-18	5	-0/+35
*	soc/amd/cezanne,picasso,sabrina/smihandler: add comment about SMN access	Felix Held	2022-08-17	1	-0/+5
*	soc/amd/*: move reset_i2c_peripherals call after early GPIO setup	Felix Held	2022-08-15	1	-1/+1
*	Revert "soc/amd/sabrina: Re-init eSPI in bootblock"	Karthikeyan Ramasubramanian	2022-08-14	1	-3/+3
*	soc/amd/mendocino/chipset_rembrandt: use right chipset folder	Felix Held	2022-08-13	1	-1/+1
*	soc/amd/mendocino: clear Port80 enable bit in ESPI Decode	Jon Murphy	2022-08-12	1	-1/+0
*	treewide: Rename Sabrina to Mendocino	Jon Murphy	2022-08-11	61	-0/+5651