coreboot.git - Coreboot firmware sources

	Commit message (Expand)	Author	Age	Files	Lines
*	soc/amd/picasso: remove warm reset flag code	Felix Held	2021-06-02	1	-14/+0
*	soc/amd/cezanne,picasso/reset: use byte I/O read for NCP_ERR	Felix Held	2021-05-22	1	-1/+1
*	soc/amd: move warm reset flag function prototypes to common code	Felix Held	2021-03-11	1	-1/+0
*	soc/amd/picasso: move chipset_handle_reset to common	Felix Held	2020-12-11	1	-11/+0
*	soc/amd/picasso/reset: use port and bit defines from cf9_reset.h	Felix Held	2020-12-10	1	-2/+3
*	soc/amd/picasso/reset: remove leftover PCI includes	Felix Held	2020-12-10	1	-2/+0
*	src: Add missing 'include <console/console.h>'	Elyes HAOUAS	2020-11-17	1	-0/+1
*	Change all assert(0) to BUG()	Julius Werner	2020-08-03	1	-1/+1
*	soc/amd/picasso: Extract reset flags from northbridge.h	Raul E Rangel	2020-05-13	1	-1/+1
*	treewide: Remove "this file is part of" lines	Patrick Georgi	2020-05-11	1	-1/+0
*	soc/amd/picasso: Add FSP support for including AGESA	Marshall Dawson	2020-05-01	1	-0/+10
*	soc/amd: Use SPDX for GPL-2.0-only files	Angel Pons	2020-04-05	1	-13/+2
*	soc: Remove copyright notices	Patrick Georgi	2020-03-18	1	-2/+0
*	src/amd/picasso: Update reset code	Marshall Dawson	2019-08-09	1	-19/+4
*	soc/amd/picasso: Create picasso as a copy of stoneyridge	Martin Roth	2019-07-02	1	-0/+73