coreboot.git - Coreboot firmware sources

	Commit message (Expand)	Author	Age	Files	Lines
*	soc/amd/stoneyridge: Normalize GPIO init	Justin TerAvest	2018-02-17	1	-2/+0
*	soc/amd/stoneyridge: initialize i2c buses marked as early init	Aaron Durbin	2018-01-30	1	-0/+3
*	soc/amd/stoneyridge: remove dependence on TSC	Aaron Durbin	2018-01-25	1	-1/+3
*	soc/amd/stoneyridge: Add new function sb_program_gpio()	Richard Spiegel	2018-01-23	1	-0/+2
*	amd/stoneyridge: Force PSP command reg settings in bootblock	Marshall Dawson	2017-12-20	1	-1/+6
*	soc/amd/stoneyridge/bootblock/bootblock.c: Fix unused value	Richard Spiegel	2017-12-19	1	-1/+0
*	soc/amd/common: Update agesawrapper_call.h	Richard Spiegel	2017-12-15	1	-2/+3
*	soc/amd/common: Move Agesa related headers	Richard Spiegel	2017-12-12	1	-2/+2
*	soc/amd/stoneyridge: Load SMU fimware using PSP	Marshall Dawson	2017-11-14	1	-0/+33
*	amd/stoneyridge: Remove fixme.c	Marshall Dawson	2017-11-08	1	-0/+23
*	soc/amd/stoneyridge: Check UART index	Marshall Dawson	2017-10-16	1	-0/+5
*	stoneyridge: Rename hudson to southbridge	Marc Jones	2017-08-14	1	-2/+2
*	soc/amd/common: Convert to C_ENVIRONMENT_BOOTBLOCK	Marshall Dawson	2017-07-27	1	-40/+38
*	soc/amd/stoneyridge: Fix most checkpatch errors	Marshall Dawson	2017-06-27	1	-2/+4
*	soc: Add AMD Stoney Ridge southbridge code	Marc Jones	2017-06-26	1	-0/+63