coreboot.git - Coreboot firmware sources

	Commit message (Expand)	Author	Age	Files	Lines
*	soc/amd/cezanne: factor out eSPI SPI2 pads configuration functions	Felix Held	2022-01-14	3	-0/+38
*	soc/amd/*/chip.h: add missing gpio.h include	Felix Held	2022-01-13	3	-0/+3
*	soc/amd/common/block: add new PCI IDs to common code	Felix Held	2022-01-12	3	-0/+4
*	soc/amd/cezanne/include/i2c: add missing types.h include	Felix Held	2022-01-11	1	-0/+1
*	soc/amd/cezanne/include/i2c: move include inside header guard	Felix Held	2022-01-11	1	-2/+2
*	src/soc: Remove unused <stdlib.h>	Elyes HAOUAS	2022-01-10	2	-2/+0
*	src/soc/amd: Remove unused <console/console.h>	Elyes HAOUAS	2022-01-10	10	-10/+0
*	src/soc/amd: Remove unused <timer.h>	Elyes HAOUAS	2022-01-10	1	-1/+0
*	src/soc/amd: Remove unused <acpi/acpi.h>	Elyes HAOUAS	2022-01-10	3	-3/+0
*	soc/amd/common/pi/agesawrapper.c: Include <string.h>	Elyes HAOUAS	2022-01-10	1	-0/+1
*	soc/amd/common/block/include/lpc: add comment about RANGE_UNIT values	Felix Held	2022-01-07	1	-1/+1
*	soc/amd/common/lpc/espi_util: move register definitions to header file	Felix Held	2022-01-07	2	-48/+56
*	soc/amd/common/block/espi: use lower case hex digits in definitions	Felix Held	2022-01-07	2	-8/+8
*	soc/amd/common/lpc/espi_util: handle espi_get_configuration error	Felix Held	2022-01-07	1	-1/+2
*	src/soc/amd: Remove unused <delay.h>	Elyes HAOUAS	2022-01-05	1	-1/+0
*	soc/amd: Remove unused <string.h>	Elyes HAOUAS	2022-01-05	2	-2/+0
*	src: Remove duplicated includes	Elyes HAOUAS	2022-01-01	1	-1/+0
*	src: Drop duplicated includes	Elyes HAOUAS	2022-01-01	2	-2/+0
*	soc/amd/cezanne: Correct S0i3 verstage softfuse bit	Rob Barnes	2021-12-20	1	-1/+1
*	soc/amd/common/lpc/espi_util: use enum cb_err type for return values	Felix Held	2021-12-20	2	-33/+29
*	soc/amd/common/lpc/espi_util: use enum cb_err type for return values	Felix Held	2021-12-20	1	-71/+75
*	soc/amd/common/lpc/espi_util: simplify espi_configure_decodes	Felix Held	2021-12-20	1	-5/+4
*	soc/amd/common/lpc/espi_util: simplify espi_get_general_configuration	Felix Held	2021-12-20	1	-2/+1
*	soc/amd/cezanne/fch: disable 48MHz output in S0i3	Felix Held	2021-12-20	2	-0/+3
*	soc/amd/stoneyridge/fch: add GNVS-related TODOs	Felix Held	2021-12-20	1	-0/+2
*	soc/amd/stoneyridge: split southbridge code	Felix Held	2021-12-20	3	-171/+175
*	soc/amd/stoneyridge: factor out AGESA-wrapper related FCH functions	Felix Held	2021-12-20	3	-57/+62
*	soc/amd/stoneyridge: factor out early AOAC initialization	Felix Held	2021-12-20	3	-33/+40
*	soc/amd: remove root of SoC directory from include path	Felix Held	2021-12-20	2	-2/+0
*	soc/amd/stoneyridge/include/southbridge: remove unneeded chip.h include	Felix Held	2021-12-20	1	-1/+0
*	soc/amd/cezanne/acpi: Add support for RTC workaround	Raul E Rangel	2021-12-18	2	-0/+28
*	soc/amd/common/block/acpimmio/print_reset_status: add missing status bit	Felix Held	2021-12-18	1	-0/+1
*	soc/amd/common/block/psp: move psp_notify_dram to psp_gen1.c	Felix Held	2021-12-15	4	-25/+27
*	soc/amd/common/block/spi/fch_spi_ctrl: improve printk messages	Felix Held	2021-12-15	1	-4/+3
*	soc/amd/common/block/spi/fch_spi_ctrl: handle failure in execute_command	Felix Held	2021-12-15	1	-3/+4
*	soc/amd/common/block/spi/fch_spi_ctrl: rework dump_state	Felix Held	2021-12-15	1	-6/+25
*	soc/amd/common/include/spi: add Cezanne-specific comment	Felix Held	2021-12-15	1	-1/+1
*	soc/amd/common/include/spi: fix SPI_FIFO_LAST_BYTE define	Felix Held	2021-12-15	1	-2/+2
*	soc/amd/{cezanne,common}: Add PSP_S0I3_RESUME_VERSTAGE Kconfig option	Rob Barnes	2021-12-14	2	-2/+13
*	soc/amd/cezanne: Don't select CPU_INFO_V2 explicitly	Nico Huber	2021-12-13	1	-1/+0
*	soc/amd/stoneyridge: use common fch_spi_early_init	Felix Held	2021-12-09	2	-69/+3
*	soc/amd/common/block/psp: add psp_efs.c to build for both PSP GEN1&2	Felix Held	2021-12-09	1	-3/+3
*	soc/amd/{cezanne,picasso,stoney,common}: Don't clear PM1 on resume	Raul E Rangel	2021-12-08	4	-4/+2
*	soc/amd/stoneyridge/southbridge: drop ENV_X86 check	Felix Held	2021-12-08	1	-2/+1
*	soc/amd/{cezanne,picasso,stoney}: Clear PM/GPE when enabling ACPI	Raul E Rangel	2021-12-08	3	-0/+3
*	soc/amd/stoneyridge/southbridge: fix setting SPI_USE_SPI100	Felix Held	2021-12-08	1	-1/+1
*	soc/amd/common/block/spi: fix setting SPI_USE_SPI100 in SPI100_ENABLE	Felix Held	2021-12-08	1	-1/+1
*	soc/amd/common/block/include/spi: update fch_spi_early_init description	Felix Held	2021-12-08	1	-1/+1
*	mb/google/zork,soc/amd/psp_verstage: Add verstage_mb_{tpm/espi}_init	Raul E Rangel	2021-12-08	1	-3/+0
*	soc/amd: use KiB and MiB definitions	Felix Held	2021-12-08	3	-3/+3