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* soc/amd/picasso/acpi: Fix PCI0 MMIO windowRaul E Rangel2021-01-281-9/+4
* soc/amd/picasso: fix CBFS MCACHE on ZorkKangheui Won2021-01-282-30/+9
* soc/amd/picasso/acpi: Remove DMA addresses for UARTsRaul E Rangel2021-01-281-8/+0
* soc/amd/cezanne/chip: add empty SoC device operationsFelix Held2021-01-281-1/+18
* soc/amd/cezanne: compress FSP binaries in CBFSFelix Held2021-01-281-0/+2
* soc/amd/picasso/chip: use switch/case statement in enable_dev()Felix Held2021-01-271-3/+9
* soc/amd/stoneyridge: Change set_sb_nvs_final()Kyösti Mälkki2021-01-271-20/+25
* soc/amd/cezanne: Add UCODE firmware to CBFSZheng Bao2021-01-272-2/+3
* soc/amd/picasso: Remove the useless definition of UCODE_FILEsZheng Bao2021-01-271-5/+0
* soc/amd: Throw an error if FWM_POSITION_INDEX is emptyZheng Bao2021-01-272-0/+6
* soc/amd/common: Only set write_acpi_tables if ACPI table is enabledZheng Bao2021-01-271-0/+2
* sb,soc/amd: Rename PMOD to PICM in ASLKyösti Mälkki2021-01-275-22/+22
* soc/amd/common: Notify SMU of AC/DC state upon resumeMarshall Dawson2021-01-271-0/+2
* soc/amd/common/block/smbus: remove stale commentFelix Held2021-01-271-5/+0
* soc/amd: Add an option to select if SOC supports ESPI sub decodeZheng Bao2021-01-263-1/+8
* soc/amd: Refactor some ACPI S3 callsKyösti Mälkki2021-01-265-24/+6
* soc/amd/picasso: Change GPIO _HID to AMDI0030Raul E Rangel2021-01-251-1/+1
* soc/amd/picasso/acpi: Change I2C _HID to AMDI0010Raul E Rangel2021-01-251-2/+2
* soc/amd/picasso/acpi: Change UART _HID to AMDI0020Raul E Rangel2021-01-251-4/+4
* soc/amd/picasso: Use makefile variable to locate UCODEZheng Bao2021-01-251-1/+1
* soc/amd/common: Refactor ACPI wake sourceKyösti Mälkki2021-01-251-10/+9
* soc/amd: Refactor ACPI power state and ELOGKyösti Mälkki2021-01-258-23/+30
* soc/amd/picasso: Add UPDs for support eDP power sequence adjustChris Wang2021-01-252-0/+25
* soc/amd/picasso: Set UPDs for tuning eDP phyChris Wang2021-01-252-0/+35
* soc/amd/common/acpi: Add _UID for PNP0C02 devicesRaul E Rangel2021-01-251-0/+2
* soc/amd/picasso/acpi: Add UID for PCI INT devicesRaul E Rangel2021-01-251-10/+10
* soc/amd/cezanne/Kconfig: select missing SSE2 optionFelix Held2021-01-241-0/+1
* soc/amd/cezanne/Kconfig: select X86_AMD_FIXED_MTRRSFelix Held2021-01-241-0/+1
* soc/amd/cezanne: add basic romstageFelix Held2021-01-241-0/+13
* soc,vendorcode/amd/cezanne: add basic FSP integrationFelix Held2021-01-244-0/+24
* soc/amd/picasso: Remove some empty stringsZheng Bao2021-01-241-2/+0
* soc/amd/cezanne: Add PSP integration for cezanneZheng Bao2021-01-243-0/+252
* ACPI: Add helpers for CBMEM_ID_POWER_STATEKyösti Mälkki2021-01-232-5/+5
* soc/amd: Rename chipset_state to chipset_power_stateKyösti Mälkki2021-01-236-7/+7
* soc/amd/picasso/pcie_gpp: Remove duplication in pirq_data declarationRaul E Rangel2021-01-231-17/+3
* soc/amd/picasso/pci_gpp: Replace the swizzle string with a u8 arrayRaul E Rangel2021-01-231-11/+11
* soc/amd/picasso/pcie_gpp: Add clarifying commentRaul E Rangel2021-01-231-0/+2
* soc/amd/picasso/acpi: Remove dummy AOAC parent deviceRaul E Rangel2021-01-232-82/+18
* soc/amd/cezanne: add pci_devs.hFelix Held2021-01-221-0/+153
* soc/amd/common/block/smbus: always return SMBus MMIO in get_sm_mmioFelix Held2021-01-221-9/+7
* soc/amd/cezanne: include LAPIC code and set MAX_CPUS to 16Felix Held2021-01-212-0/+5
* soc/amd/cezanne/Kconfig: select IDT_IN_EVERY_STAGEFelix Held2021-01-201-0/+1
* soc/amd/picasso/Kconfig: drop EHCI_BARFelix Held2021-01-201-4/+0
* soc/amd/picasso/Kconfig: drop HAVE_USBDEBUG_OPTIONSFelix Held2021-01-201-1/+0
* soc/amd/picasso/mrc_cache.c: Remove unused <bootstate.h>Elyes HAOUAS2021-01-201-1/+0
* soc/amd: Drop unnecessary <soc/nvs.h> includeKyösti Mälkki2021-01-192-2/+0
* soc/amd/picasso,stoneyridge: Unify set_nvs_sws()Kyösti Mälkki2021-01-196-69/+65
* soc/amd/stoneyridge: Add struct chipset_stateKyösti Mälkki2021-01-192-5/+11
* soc/amd/picasso: move HAVE_ACPI_TABLES from mainboards to SoCFelix Held2021-01-191-0/+1
* ACPI: Refactor ChromeOS specific ACPI GNVSKyösti Mälkki2021-01-182-16/+0
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