coreboot.git - Coreboot firmware sources

	Commit message (Expand)	Author	Age	Files	Lines
*	src: Make PCI ID define names shorter	Felix Singer	2022-03-07	1	-1/+1
*	soc/cavium: Drop unneeded empty lines	Elyes HAOUAS	2020-09-22	2	-3/+0
*	symbols: Change implementation details of DECLARE_OPTIONAL_REGION()	Julius Werner	2020-08-27	1	-2/+0
*	src: Remove leading blank lines from SPDX header	Elyes HAOUAS	2020-05-18	1	-3/+0
*	treewide: Remove "this file is part of" lines	Patrick Georgi	2020-05-11	9	-9/+0
*	src/: Replace GPL boilerplate with SPDX headers	Patrick Georgi	2020-05-09	1	-9/+1
*	soc/cavium: Use SPDX for GPL-2.0-only files	Angel Pons	2020-04-06	8	-106/+18
*	soc: Remove copyright notices	Patrick Georgi	2020-03-18	9	-14/+0
*	devicetree: Fix improper use of chip_operations	Kyösti Mälkki	2019-10-04	1	-0/+4
*	soc/cavium/common/Makefile: Convert STACK_SIZE value to decimal	Elyes HAOUAS	2019-10-04	1	-1/+2
*	device/pci_ops: Define pci_find_capability() just once	Kyösti Mälkki	2019-07-04	1	-6/+4
*	soc/cavium/common/bootblock: Remove unused variables	Elyes HAOUAS	2019-04-25	1	-5/+1
*	src: include <assert.h> when appropriate	Elyes HAOUAS	2019-04-23	1	-1/+0
*	src: Use include <delay.h> when appropriate	Elyes HAOUAS	2019-04-06	1	-1/+1
*	src: Use include <reset.h> when appropriate	Elyes HAOUAS	2019-03-29	1	-1/+0
*	coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)	Julius Werner	2019-03-08	1	-3/+3
*	arch/io.h: Drop unnecessary include	Kyösti Mälkki	2019-03-04	2	-2/+0
*	soc/cavium/common: Make ecam0_get_bar_val common	Patrick Rudolph	2019-02-25	3	-0/+106
*	drivers/cavium: Add UART PCI driver	Patrick Rudolph	2019-02-22	3	-0/+43
*	symbols.h: Add macro to define memlayout region symbols	Julius Werner	2019-02-22	1	-1/+1
*	soc/cavium: Remove white spaces before tabs	Elyes HAOUAS	2019-01-09	1	-8/+8
*	src: Add missing include <stdint.h>	Elyes HAOUAS	2018-11-01	1	-0/+2
*	soc/cavium/cn81xx: Fix minor things	Patrick Rudolph	2018-08-10	2	-28/+1
*	soc/cavium/cn81xx: Use ATF from blobs repo	Patrick Rudolph	2018-07-30	4	-60/+1
*	soc/cavium/bootblock: Get rid of register X1	Patrick Rudolph	2018-07-30	2	-4/+0
*	soc/cavium: Add PCI support	Patrick Rudolph	2018-07-19	1	-0/+27
*	soc/cavium: Add secondary CPU support	Patrick Rudolph	2018-07-10	1	-1/+1
*	cavium: Add CN81xx SoC and eval board support	David Hendricks	2018-07-10	11	-0/+477