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path: root/src/soc/imgtec
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* soc/imgtech/pistachio: Convert to `board_reset()`Nico Huber2018-10-222-2/+1
* src: Use tabs for indentationElyes HAOUAS2018-10-081-1/+1
* soc/imgtec/pistachio: Get rid of device_tElyes HAOUAS2018-06-041-3/+3
* soc{broadcom,imgtec,mediatek,qualcomm}: stop using spi_xfer_two_vectorsAaron Durbin2018-04-231-1/+0
* driver/uart: Introduce a way for mainboard to override the baudrateJulien Viard de Galbert2018-02-211-2/+2
* src/soc: Fix various typosJonathan Neuschäfer2018-02-202-3/+3
* soc: Add Kconfig for each soc vendorChris Ching2017-10-231-0/+2
* mb/*/*: Remove rtc nvram configurable baud rateArthur Heymans2017-09-231-1/+1
* Consolidate reset API, add generic reset_prepare mechanismJulius Werner2017-06-131-1/+1
* spi: Remove unused/unnecessary spi_init function definitionsFurquan Shaikh2017-06-071-7/+0
* soc/imgtec/pistachio: Move spi driver to use spi_bus_mapFurquan Shaikh2017-05-241-16/+22
* drivers/spi: Re-factor spi_crop_chunkFurquan Shaikh2017-05-051-5/+1
* spi: Get rid of SPI_ATOMIC_SEQUENCINGFurquan Shaikh2016-12-232-6/+2
* spi: Define and use spi_ctrlr structureFurquan Shaikh2016-12-051-49/+56
* spi: Pass pointer to spi_slave structure in spi_setup_slaveFurquan Shaikh2016-12-051-19/+27
* spi: Fix parameter types for spi functionsFurquan Shaikh2016-12-051-11/+11
* spi: Get rid of max_transfer_size parameter in spi_slave structureFurquan Shaikh2016-11-221-13/+44
* spi: Clean up SPI flash driver interfaceFurquan Shaikh2016-11-221-1/+1
* drivers/uart: Use uart_platform_refclk for all UART modelsLee Leahy2016-05-091-0/+1
* imgtec/pistachio: Fix memlayout ASSERT with new binutilsStefan Reinauer2016-04-211-2/+2
* urara: Increase bootblock sizeJulius Werner2016-02-221-4/+17
* tegra132/pistachio: Increase romstage size in memlayout.ldJulius Werner2016-02-121-3/+3
* imgtec/pistachio: disable default RPU gate register valuesIonela Voinescu2015-12-312-0/+13
* imgtec/pistachio: memlayout: update GRAM sizeIonela Voinescu2015-12-311-1/+1
* imgtec/pistachio: I2C: fix base address for I2C clock setupIonela Voinescu2015-12-311-2/+2
* imgtec/pistachio: identity map SOC registers regionIonela Voinescu2015-12-311-0/+2
* imgtec/pistachio: Add SOC_REGISTERS memory regionIonela Voinescu2015-12-311-0/+2
* imgtec/pistachio: Use SYS PLL in integer modeIonela Voinescu2015-12-311-2/+38
* mips: add coherency argument to identity mappingIonela Voinescu2015-12-291-3/+3
* mainboard/google/urara: change SYS PLL to 700MHzIonela Voinescu2015-12-272-9/+18
* imgtec/pistachio: DDR2, DDR3: DLL reset setIonela Voinescu2015-12-212-2/+2
* imgtec/pistachio: DDR2, DDR3: DQS gate earlyIonela Voinescu2015-12-213-10/+25
* imgtec/pistachio: increase CBFS cacheIonela Voinescu2015-12-211-2/+2
* Drop src/cpu/ indirection for MIPSStefan Reinauer2015-12-171-1/+4
* soc/imgtec/pistachio: add implementation for system resetIonela Voinescu2015-12-171-4/+6
* soc/imgtec/pistachio: Implement hard_reset()Stefan Reinauer2015-12-173-0/+27
* tree: drop last paragraph of GPL copyright headerPatrick Georgi2015-10-3113-52/+0
* linking: link bootblock.elf with .data and .bss sections againAaron Durbin2015-09-221-7/+1
* verstage: use common program.ld for linkingAaron Durbin2015-09-091-1/+0
* imgtec/pistachio: remove timestamp_get() implementationAaron Durbin2015-08-311-6/+1
* imgtech/pistacho: Add vboot2 memory regionPatrick Georgi2015-08-091-1/+3
* Remove address from GPLv2 headersPatrick Georgi2015-06-241-2/+1
* Remove old HAVE_UART_MEMORY_MAPPED select statementsMartin Roth2015-06-211-1/+0
* pistachio: add DDR3 initialization codeIonela Voinescu2015-06-125-112/+655
* pistachio: Use passive windowing as DQS gating schemeIonela Voinescu2015-06-121-0/+23
* pistachio: sort included header filesIonela Voinescu2015-06-107-13/+13
* pistachio: initialize cbmem area to be emptyIonela Voinescu2015-06-101-0/+7
* pistachio: increase romstage sizeIonela Voinescu2015-06-091-2/+2
* Revert "pistashio: bump up romstage size"Aaron Durbin2015-06-021-2/+2
* pistashio: bump up romstage sizeAaron Durbin2015-05-261-2/+2
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