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path: root/src/soc/intel/alderlake/bootblock
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* soc/alderlake: Enable all bits for IO decode / enable registerSean Rhodes2022-06-301-2/+6
* soc/intel: Add Raptor Lake device IDszhixingma2022-06-281-0/+6
* soc/intel/alderlake/report_platform.c: Add ADL-S identificationMichał Żygowski2022-06-171-1/+35
* soc/intel: Add Raptor Lake device IDsBora Guvendik2022-05-161-3/+38
* soc/intel/alderlake: Use correct formatted print for size_tArthur Heymans2022-05-131-1/+1
* soc/intel: clean up dmi driver codeWonkyu Kim2022-04-201-6/+0
* soc/intel/alderlake/bootblock/pch.c: Enable SIO 4e/4f ports decodingMichał Żygowski2022-04-111-2/+2
* soc/intel/alderlake: Add support to update descriptor at runtimeReka Norman2022-04-071-0/+92
* soc/intel/alderlake: Remove ALDERLAKE_A0_CONFIG_PMC_DESCRIPTOR KconfigSridhar Siricilla2022-04-072-91/+0
* soc/intel/alderlake: Add new CPU IDLean Sheng Tan2022-04-041-0/+1
* soc/intel/alderlake: Update CPU IDs with correct steppingsLean Sheng Tan2022-04-042-5/+5
* soc/intel/alderlake: Use Kconfigs for Descriptor RegionSridhar Siricilla2022-03-071-9/+8
* src: Make PCI ID define names shorterFelix Singer2022-03-071-79/+79
* soc/intel/adl/bootblock/report_platform.c: Use the correct formatArthur Heymans2022-02-211-1/+1
* soc/intel/common: Re-use Alder Lake-M device IDs for Alder Lake-NUsha P2022-02-111-0/+2
* soc/intel/alderlake: Add PMC register base for ADL-NUsha P2022-02-011-0/+5
* soc/intel/alderlake: Add Alder Lake P IGD device IDsKane Chen2022-01-311-0/+3
* soc/intel/common: Include Alder Lake-N device IDsUsha P2022-01-251-0/+3
* soc/intel/{adl,common}: Support alderlake host device id 0x4619Kane Chen2022-01-181-0/+1
* soc/intel/alderlake: Factor out A0 stepping workaroundAngel Pons2022-01-112-0/+92
* soc/intel/common: Include Alder Lake-N device IDsUsha P2021-11-291-0/+6
* soc/intel/alderlake: Add CPU ID 0x906a4Meera Ravindranath2021-09-301-0/+1
* soc/intel/alderlake: Add GFx Device ID 0x46c3Selma Bensaid2021-09-291-0/+1
* soc/intel/adl: Update PCI ID for ADL-M SKUSumeet Pawnikar2021-08-201-1/+1
* soc/intel/alderlake: Implement report_cache_info() functionSubrata Banik2021-08-111-0/+18
* soc/intel/alderlake: Add GFx Device ID 0x46aaBora Guvendik2021-08-051-0/+1
* soc/intel/alderlake: Make use of `cpu/intel/cpu_ids.h'Subrata Banik2021-07-171-1/+1
* soc/intel/alderlake: Add GFx Device ID 0x46a6Maulik V Vaghela2021-07-141-0/+1
* soc/intel/alderlake: Add GFx Device ID 0x46b3Meera Ravindranath2021-06-211-0/+1
* soc/intel/{common,alderlake}: Use generic name "Alderlake Platform"Sridhar Siricilla2021-06-111-3/+3
* soc/intel: Add Alder Lake's GT device IDSridhar Siricilla2021-06-081-0/+1
* soc/intel/common: Add Alder Lake device IDsSumeet R Pawnikar2021-05-211-0/+3
* soc/intel/alderlake: Update CPU and IGD Device IDsMaulik V Vaghela2021-05-141-0/+2
* soc/intel/alderlake: Add LPC and IGD device Ids for Alderlake MMaulik V Vaghela2021-04-061-0/+3
* soc/intel: Drop `bootblock_cpu_init()` functionAngel Pons2021-03-012-21/+2
* soc/intel/{alderlake,apollolake}: Remove unused <string.h>Elyes HAOUAS2021-02-161-1/+0
* soc/intel/*: drop incomplete and unneeded check for DMI SRLOCKMichael Niewöhner2021-01-311-15/+1
* soc/intel/alderlake: Remove pch.h from SoC directorySubrata Banik2021-01-302-2/+0
* soc/intel/{skl,cnl,xsp,icl,tgl,ehl,adl,jsl}: use common LPC mirroringMichael Niewöhner2021-01-251-16/+2
* soc/intel/alderlake: Add PCH ID 0x5182Subrata Banik2021-01-121-0/+1
* soc/intel/common/dmi: Move DMI defines into DMI driver headerSrinidhi N Kaushik2020-12-091-3/+1
* soc/intel: Configure P2SB before other PCH controllersFurquan Shaikh2020-11-291-2/+7
* soc/intel/alderlake: Add PCH ID 0x5181Subrata Banik2020-11-121-0/+1
* soc/intel/alderlake: Rename pch_init() codeSubrata Banik2020-09-102-2/+2
* soc/intel/alderlake/bootblock: Do initial SoC commit till bootblockSubrata Banik2020-09-054-0/+405
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