summaryrefslogtreecommitdiffstats
path: root/src/soc/intel/alderlake/chip.c
Commit message (Expand)AuthorAgeFilesLines
* soc/alderlake: Add ADL-S PCIe supportMichał Żygowski2022-06-281-0/+25
* soc/intel/alderlake/chip.c: Add missing ADL-S USB ports ACPI namesMichał Żygowski2022-06-201-0/+10
* soc/intel/*: Use SSDT to pass A4GB and A4GSArthur Heymans2022-05-161-0/+2
* soc/intel/alderlake: Add missing ACPI device path namesTarun Tuli2022-05-061-0/+4
* soc/intel/adl: Send EOP early in the boot sequenceMAULIK V VAGHELA2022-03-101-0/+15
* soc/intel/alderlake: Enable eMMC based on dev enabledKrishna Prasad Bhat2022-02-211-0/+3
* treewide: Remove "ERROR: "/"WARN: " prefixes from log messagesJulius Werner2022-02-071-1/+1
* soc/intel/adl: Update devicetree based on remapping for TBT PCIeMAULIK V VAGHELA2022-01-311-0/+3
* soc/intel/alderlake: Add minimal ACPI support for PEG portsTim Wawrzynczak2022-01-061-0/+3
* soc/intel/alderlake: Add igd deviceWisley Chen2021-09-161-0/+1
* soc/intel/alderlake: Add support for I2C6 and I2C7Varshit B Pandya2021-07-201-0/+2
* soc/intel/alderlake: Enable support for common IRQ blockTim Wawrzynczak2021-06-291-1/+16
* soc/intel: Replace open-coded buffer length calculationAngel Pons2021-04-211-4/+2
* soc/intel: Rename and move MISCCFG_GPIO_PM_CONFIG_BITS definition to soc/gpio.hSubrata Banik2021-03-271-1/+1
* soc/intel/{adl,jsl,ehl,tgl}: Remove ITSS polarity restoreAamir Bohra2021-02-241-8/+0
* soc/amd,intel: Drop s3_resume parameter on FSP-S functionsKyösti Mälkki2021-02-091-2/+1
* soc/intel/alderlake: Update PCH and CPU PCIe RP tableEric Lai2021-01-181-7/+2
* soc/intel: hook up new gpio device in the soc chipsMichael Niewöhner2020-12-301-0/+3
* soc/intel/alderlake/ramstage: Do initial SoC commit till ramstageSubrata Banik2020-10-031-0/+191
generated by cgit v1.2.3 (git 2.25.1) at 2024-06-09 09:51:24 +0000