coreboot.git - Coreboot firmware sources

	Commit message (Expand)	Author	Age	Files	Lines
*	soc/intel/alderlake: Refactor PCIE port config	Eric Lai	2021-02-05	1	-29/+3
*	soc/intel/alderlake: Create separate Kconfig for CLKSRC and CLKREQ	Subrata Banik	2021-02-01	1	-2/+2
*	soc/intel/alderlake: Remove pch.h from SoC directory	Subrata Banik	2021-01-30	1	-1/+4
*	soc/intel/common: Move L1_substates_control to pcie_rp.h	Eric Lai	2021-01-18	1	-6/+2
*	soc/intel/alderlake: Refactor SoC code to maintain CPU and PCH PCIE RPs	Subrata Banik	2021-01-10	1	-7/+10
*	soc/intel/alderlake: Drop unreferenced devicetree settings	Angel Pons	2020-12-14	1	-8/+0
*	mb/*,soc/intel: drop the obsolete dt option `speed_shift_enable`	Michael Niewöhner	2020-10-26	1	-2/+0
*	soc/intel/alderlake/ramstage: Do initial SoC commit till ramstage	Subrata Banik	2020-10-03	1	-5/+15
*	soc/intel/alderlake/romstage: Do initial SoC commit till romstage	Subrata Banik	2020-09-15	1	-0/+348