summaryrefslogtreecommitdiffstats
path: root/src/soc/intel/alderlake/fsp_params.c
Commit message (Expand)AuthorAgeFilesLines
* soc/intel/alderlake: Add IRQ constraints for CPU PCIe portsTim Crawford2022-08-021-0/+6
* soc/intel/alderlake: Set VccIn Aux Imon IccMax for ADL-S 4+0 and 2+0Michał Żygowski2022-07-291-0/+2
* soc/intel/alderlake: Add support for more CPU PCIe RP UPDsTim Wawrzynczak2022-07-281-0/+6
* soc/intel/alderlake: Support PCIe hardware compliance test modeSridahr Siricilla2022-07-141-2/+6
* soc/intel/adl: Add support to configure package c-state demotionV Sowmya2022-07-081-0/+2
* soc/intel/alderlake: RPL-P power limits and VR settingsJeremy Compostella2022-07-041-1/+5
* soc/intel/alderlake: remove unnecessary test conditionJeremy Compostella2022-07-041-6/+2
* soc/intel/alderlake/fsp_params.c: Handle CnviWifiCore parameterMichał Żygowski2022-07-041-0/+6
* soc/intel/alderlake: add chipset devicetree for ADL-SMichał Kopeć2022-06-301-0/+5
* soc/intel/alderlake: Add ADL-S PCI IRQ constraintsMichał Żygowski2022-06-301-1/+180
* soc/intel/alderlake/fsp_params.c: Fill PCI SSID parametersMichał Żygowski2022-06-281-0/+65
* soc/intel/alderlake: Implement MultiPhase SI Init Index 2 callbackSubrata Banik2022-06-271-0/+11
* soc/intel/alderlake: add GPIO definitions for PCH-SMichał Kopeć2022-06-221-1/+1
* soc/intel/alderlake: Allow possible options for MP InitSubrata Banik2022-06-221-2/+10
* soc/intel/alderlake/fsp_params.c: Add VccIn Aux Imon IccMax for ADL-SMichał Żygowski2022-06-161-1/+7
* soc/intel/alderlake: Add support for PCIe slot & device detect timeoutCliff Huang2022-06-091-0/+4
* soc/intel/alderlake: Add chip config for DPA PreWakeleo.chou2022-05-251-0/+1
* soc/intel/alderlake: Update the VccIn Aux Imon IccMaxV Sowmya2022-05-181-0/+6
* soc/intel/alderlake: Add support for UFS controllerMeera Ravindranath2022-04-131-0/+5
* soc/intel/alderlake: Allow mainboard to configure USB2 Phy power gatingSridhar Siricilla2022-04-131-0/+2
* soc/intel/adl: Disable FSP debug output if !FSP_ENABLE_SERIAL_DEBUGSubrata Banik2022-04-111-2/+4
* soc/intel/alderlake: Hook up PAVP to KconfigLean Sheng Tan2022-04-071-0/+1
* soc/intel/alderlake: Hook up VrPowerDeliveryDesign to devicetreeLean Sheng Tan2022-04-071-0/+2
* soc/intel/alderlake: Use coreboot native event handler for FSP-M/SSubrata Banik2022-03-281-0/+3
* soc/intel/{adl,common}: Add ASPM setting in pcie_rp_configKevin Chang2022-03-221-0/+22
* soc/intel/alderlake: Update ADL-P id list of th VccIn Aux Imon IccMax valuesCurtis Chen2022-03-171-0/+4
* soc/intel/alderlake: Allow mainboard to configure c1-state auto-demotionMAULIK V VAGHELA2022-03-151-0/+2
* soc/intel/adl/chip.h: Convert all camel case variables to snake caseMAULIK V VAGHELA2022-03-151-29/+29
* src: Make PCI ID define names shorterFelix Singer2022-03-071-7/+7
* soc/intel/alderlake: Fix function pointer typeArthur Heymans2022-02-211-1/+1
* soc/intel/alderlake: Enable eMMC based on dev enabledKrishna Prasad Bhat2022-02-211-0/+14
* soc/intel/alderlake: Enable USB2 port reset message on Type-C portsAnil Kumar2022-02-041-0/+3
* soc/intel/alderlake: Skip FSP to unlock GPIO PadsSubrata Banik2022-01-261-1/+1
* src: Remove unused <cbfs.h>Elyes HAOUAS2022-01-171-1/+0
* vendorcode/intel/fsp: Add Alder Lake FSP headers for FSP v2511_04Nick Vaccaro2022-01-131-1/+1
* soc/intel/alderlake: Hook up FSP-S CPU PCIe UPDsTim Wawrzynczak2022-01-071-0/+22
* soc/intel/alderlake: Add TDP to give correct VR configurationCurtis Chen2021-12-031-10/+9
* soc/intel/alderlake: Add ADLP 4+4+2 power configurationsCurtis Chen2021-11-251-0/+1
* soc/intel/alderlake: Update the VccIn Aux Imon IccMax for ADL-MBora Guvendik2021-11-191-0/+4
* soc/intel/alderlake: Add Acoustic noise mitigation UPDsWisley Chen2021-11-181-0/+14
* soc/intel/alderlake: Enable Intel FIVR RFI settingsWisley Chen2021-11-091-0/+9
* soc/intel/alderlake: Fix wrong FIVR configs assignmentBora Guvendik2021-10-201-1/+1
* soc/intel: transition full control over PM Timer from FSP to corebootMichael Niewöhner2021-10-171-0/+14
* soc/intel/alderlake: fix NULL pointer dereferenceSelma Bensaid2021-10-151-5/+7
* soc/intel/alderlake: Skip setting D0I3 bit for HECI devicesSubrata Banik2021-10-061-0/+2
* src/soc/intel/alderlake: Add PsysPmax settingRyan Lin2021-10-041-0/+7
* soc/intel/alderlake: Add ADLP 242 power configurationsTracy Wu2021-09-291-0/+3
* soc/intel/alderlake: Add support for power cycle and SLP signal durationTim Wawrzynczak2021-09-291-0/+31
* soc/intel/alderlake: Use intel_microcode_find() to locate ucode.binSubrata Banik2021-09-251-2/+4
* soc/intel/alderlake: Switch to using device pointersFurquan Shaikh2021-09-241-9/+8
generated by cgit v1.2.3 (git 2.25.1) at 2024-06-20 07:45:18 +0000