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path: root/src/soc/intel/alderlake/romstage
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* soc/intel: Rename Makefiles from .inc to .mkMartin Roth2024-01-241-0/+0
* soc/intel/alderlake: Hook up the OC watchdogMichał Żygowski2023-09-201-0/+3
* cpu/intel: Move is_tme_supported() from soc/intel to cpu/intelJeremy Compostella2023-09-121-0/+1
* soc/intel/alderlake: Set PchHdaSdiEnable for Alder LakeSean Rhodes2023-08-171-2/+0
* soc/intel/alderlake: Depend RPL-guarded FSP UPDs on FSP_USE_REPOMichał Żygowski2023-08-031-2/+3
* soc/intel/alderlake: Hook up UPD PchHdaSdiEnableBora Guvendik2023-07-211-0/+3
* soc/intel/alderlake: Hook up UPD DisableSagvReorderBora Guvendik2023-07-131-0/+1
* soc/intel/alderlake: Hook up UPD LowerBasicMemTestSizeBora Guvendik2023-07-131-0/+3
* soc/intel: Add max memory speed into dimm infoEric Lai2023-06-151-1/+2
* lib: Support localized text of memory_training_desc in ux_locales.cHsuan Ting Chen2023-06-041-4/+12
* vga: Change the arguments of vga_write_text to support extended ASCIIHsuan Ting Chen2023-04-281-1/+4
* soc/intel/(adl, cmn, mtl): Refactor cse_fw_sync() functionSubrata Banik2023-04-211-4/+1
* soc/intel/alderlake: Hook the VT-d DMA protection optionMichał Żygowski2023-03-172-0/+6
* soc/intel/alderlake: Hook up PchHdaAudioLinkHdaEnable to devicetreeSean Rhodes2023-03-011-7/+1
* intel/alderlake: remove skip_mbp_hob SOC chip configKapil Porwal2023-02-231-1/+1
* soc/intel/alderlake: Hook up DisableDynamicTccoldHandshake to dev treeKane Chen2023-02-031-0/+5
* soc/intel/alderlake: Add entries to eventLog on invocation of early SOLTarun Tuli2023-02-024-7/+12
* soc/intel/alderlake: Implement API to disable UFS controllersSubrata Banik2023-01-241-0/+30
* soc/intel/alderlake: Inform user during CSE updateJeremy Compostella2023-01-245-21/+46
* soc/intel/alderlake: Add print that MRC training screen displayedTarun Tuli2023-01-181-0/+1
* soc/intel/alderlake: Avoid redundant chipset programming in romstageSubrata Banik2023-01-171-14/+14
* soc/intel/alderlake: Inform user of memory trainingJeremy Compostella2023-01-122-0/+30
* soc/intel/alderlake: Add romstage early graphics supportJeremy Compostella2023-01-123-0/+46
* soc/intel/alderlake: Disable Intel TXT based on `INTEL_TXT` configSubrata Banik2023-01-091-0/+8
* soc/intel/alderlake: Use common gpio.h includeDinesh Gehlot2022-12-271-1/+1
* soc/intel/alderlake: Update cpu and pch tracehub modesSridhar Siricilla2022-12-021-0/+10
* soc/intel: Add node_num to dimm_info struct + adjust dimm_info_fillDavid Milosevic2022-11-171-1/+2
* soc/intel/alderlake: Add IBECCMaximilian Brune2022-11-041-0/+19
* soc/intel: Enable TME based on supported CPU SKU and config optionSubrata Banik2022-08-211-1/+1
* soc/intel/alderlake: Add support to skip the MBP HOBV Sowmya2022-08-191-0/+3
* soc/intel/alderlake/fsp_params.c: Set DdrSpeedControl UPDFranklin Lin2022-07-201-1/+3
* soc/intel/alderlake: Support PCIe hardware compliance test modeSridahr Siricilla2022-07-141-0/+4
* soc/intel/alderlake: Add check for CSE FW sync in romstageKrishna P Bhat D2022-07-061-1/+1
* soc/intel/alderlake: Drop debug interface selectionSubrata Banik2022-06-261-3/+0
* soc/intel/alderlake: add GPIO definitions for PCH-SMichał Kopeć2022-06-221-1/+1
* soc/intel/alderlake: Skip PCIe source clock assignment if incorrectCliff Huang2022-06-181-0/+4
* soc/intel/{alderlake, common}: Rename the pre_mem_ft structureSridhar Siricilla2022-06-171-1/+1
* soc/intel: Rename heci_init to cse_initSubrata Banik2022-06-041-1/+1
* soc/intel/alderlake: Hook up FSP hyper-threading setting to option APIFelix Singer2022-05-261-2/+2
* soc/intel/adl/chip.h: Rename max_dram_speed to include unitsScott Chao2022-04-271-2/+2
* soc/intel/adl: Disable FSP debug output if !FSP_ENABLE_SERIAL_DEBUGSubrata Banik2022-04-111-7/+16
* soc/intel/alderlake: Enable debug driver for Alder Lake platformSridhar Siricilla2022-04-061-0/+4
* soc/intel/alderlake: Update CPU IDs with correct steppingsLean Sheng Tan2022-04-042-2/+2
* soc/intel/alderlake: Use coreboot native event handler for FSP-M/SSubrata Banik2022-03-281-0/+6
* soc/intel/adl/chip.h: Convert all camel case variables to snake caseMAULIK V VAGHELA2022-03-151-10/+10
* soc/intel/alderlake: Inject CSE TS into CBMEM timestamp tableBora Guvendik2022-03-101-0/+4
* drivers/wifi,soc/intel/adl: Move CnviDdrRfim property to driversTim Wawrzynczak2022-03-091-1/+8
* timestamps: Rename timestamps to make names more consistentJakub Czapiga2022-03-081-2/+2
* mb, soc: change mainboard_memory_init_params prototypeZhuohao Lee2022-02-251-2/+2
* soc/intel/alderlake: Fix function pointer typeArthur Heymans2022-02-211-1/+1
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