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path: root/src/soc/intel/alderlake
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* soc/intel/alderlake: Fix RPL-P 282 15W GT ICC MAXJeremy Compostella2022-08-071-2/+2
* soc/intel/alderlake: Add config for IoT FSP supportLean Sheng Tan2022-08-031-0/+10
* soc/soc/intel: Add UFS device with ref-clk-freq propertyMeera Ravindranath2022-08-031-0/+4
* soc/intel/alderlake: Configure DDR5 Physical channel width to 64Meera Ravindranath2022-08-021-1/+1
* soc/intel/alderlake: Add IRQ constraints for CPU PCIe portsTim Crawford2022-08-021-0/+6
* soc/intel/alderlake: Add missing TDP and Power Limits for ADL-SMichał Żygowski2022-07-292-1/+53
* soc/intel/alderlake: Set VccIn Aux Imon IccMax for ADL-S 4+0 and 2+0Michał Żygowski2022-07-291-0/+2
* soc/intel/alderlake/vr_config.c: Add VR params for ADL-SMichał Żygowski2022-07-291-0/+60
* soc/intel/alderlake: Add support for more CPU PCIe RP UPDsTim Wawrzynczak2022-07-281-0/+6
* soc/intel/alderlake: Enable LPIT supportJeremy Soller2022-07-282-0/+3
* soc/intel/alderlake: Set Energy Perf Bias appropriate default valueJeremy Compostella2022-07-281-2/+3
* soc/intel/alderlake: Enable Energy/Performance Bias controlJeremy Compostella2022-07-281-1/+2
* soc/intel/alderlake: Hide PMC and IOM devicesJeremy Soller2022-07-232-0/+4
* soc/intel/alderlake/fsp_params.c: Set DdrSpeedControl UPDFranklin Lin2022-07-201-1/+3
* soc/intel/common/pch: Decouple CLIENT from BASEAngel Pons2022-07-201-1/+1
* soc/intel/alderlake: Support PCIe hardware compliance test modeSridahr Siricilla2022-07-143-2/+11
* soc/intel/alderlake: Hook-up public Alder Lake microcodeMichał Żygowski2022-07-082-1/+19
* soc/intel/adl: Add support to configure package c-state demotionV Sowmya2022-07-082-0/+9
* soc/intel/alderlake: change functions arguments to constEran Mitrani2022-07-072-8/+8
* soc/intel/alderlake/acpi/gpio.asl: Add GPIO Commnity 3 for ADL-SMichał Żygowski2022-07-071-0/+11
* soc/intel/alderlake/acpi/gpio.asl: Fix lower case typoMichał Żygowski2022-07-071-1/+1
* soc/intel/alderlake: Add check for CSE FW sync in romstageKrishna P Bhat D2022-07-061-1/+1
* soc/intel/alderlake: RPL-P power limits and VR settingsJeremy Compostella2022-07-044-1/+63
* soc/intel/alderlake: remove unnecessary test conditionJeremy Compostella2022-07-041-6/+2
* soc/intel/alderlake/fsp_params.c: Handle CnviWifiCore parameterMichał Żygowski2022-07-041-0/+6
* soc/intel/alderlake: Hook up ADL-P and ADL-S public FSPMichał Żygowski2022-07-041-3/+9
* soc/alderlake: Enable all bits for IO decode / enable registerSean Rhodes2022-06-301-2/+6
* soc/intel/alderlake: Add BUILDING_WITH_DEBUG_FSPKangheui Won2022-06-301-0/+6
* soc/intel/alderlake: add chipset devicetree for ADL-SMichał Kopeć2022-06-304-1/+245
* soc/intel/alderlake: Add ADL-S PCI IRQ constraintsMichał Żygowski2022-06-301-1/+180
* soc/intel/alderlake/iomap: Correct the ADL-S reserved rangeMichał Żygowski2022-06-301-6/+3
* soc/intel: Add Raptor Lake device IDszhixingma2022-06-282-0/+7
* soc/intel/alderlake/fsp_params.c: Fill PCI SSID parametersMichał Żygowski2022-06-281-0/+65
* soc/alderlake: Add ADL-S PCIe supportMichał Żygowski2022-06-283-0/+82
* soc/intel/alderlake/acpi: Add ADL-S devicesMichał Żygowski2022-06-284-4/+337
* soc/intel/*/Kconfig: Fix typo in commentAngel Pons2022-06-271-1/+1
* soc/intel/alderlake: Implement MultiPhase SI Init Index 2 callbackSubrata Banik2022-06-271-0/+11
* soc/intel/alderlake: Drop debug interface selectionSubrata Banik2022-06-262-12/+0
* soc/intel/adl: Cast size in systemagent.c to fix overflowEran Mitrani2022-06-231-2/+2
* soc/intel/alderlake/romstage: Add desktop UserBd optionsMichał Żygowski2022-06-231-1/+4
* soc/intel/alderlake: Fix PRMRR resource range calculation issueSubrata Banik2022-06-231-3/+19
* soc/intel/alderlake: add GPIO definitions for PCH-SMichał Kopeć2022-06-229-12/+1160
* soc/intel/alderlake: Remove menu option for MAX_PCIE_CLOCK_SRCCliff Huang2022-06-221-1/+0
* soc/intel/alderlake: Allow possible options for MP InitSubrata Banik2022-06-222-3/+28
* device/resource: Add _kb postfix for resource allocatorsKyösti Mälkki2022-06-221-1/+1
* soc/intel/alderlake/chip.c: Add missing ADL-S USB ports ACPI namesMichał Żygowski2022-06-201-0/+10
* soc/intel/alderlake: Skip PCIe source clock assignment if incorrectCliff Huang2022-06-181-0/+4
* soc/intel/{alderlake, common}: Rename the pre_mem_ft structureSridhar Siricilla2022-06-171-1/+1
* soc/intel/alderlake/report_platform.c: Add ADL-S identificationMichał Żygowski2022-06-171-1/+35
* soc/intel/alderlake: Unselect USB4 and TCSS options for ADL-SMichał Żygowski2022-06-162-5/+10
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